| commit | 2a0162c0193a73ef16aee67dbe66abb9d2e4717c | [log] [tgz] |
|---|---|---|
| author | SpencerAbson <Spencer.Abson@arm.com> | Tue Nov 26 16:50:51 2024 +0000 |
| committer | GitHub <noreply@github.com> | Tue Nov 26 16:50:51 2024 +0000 |
| tree | e4861ab44820c0c2fe17d7717d548a6b80b780db | |
| parent | ced2fc7819d5ddea616ec330f18e08ff284c1868 [diff] |
[AArch64][SVE] Change the immediate argument in svextq (#115340) In order to align with `svext` and NEON `vext`/`vextq`, this patch changes immediate argument in `svextq` such that it refers to elements of the size of those of the source vector, rather than bytes. The [spec for this intrinsic](https://github.com/ARM-software/acle/blob/main/main/acle.md#extq) is ambiguous about the meaning of this argument, this issue was raised after there was a differing interpretation for it from the implementers of the ACLE in GCC. For example (with our current implementation): `svextq_f64(zn_f64, zm_f64, 1)` would, for each 128-bit segment of `zn_f64,` concatenate the highest 15 bytes of this segment with the first byte of the corresponding segment of `zm_f64`. After this patch, the behavior of `svextq_f64(zn_f64, zm_f64, 1)` would be, for each 128-bit vector segment of `zn_f64`, to concatenate the higher doubleword of this segment with the lower doubleword of the corresponding segment of `zm_f64`. The range of the immediate argument in `svextq` would be modified such that it is: - [0,15] for `svextq_{s8,u8}` - [0,7] for `svextq_{s16,u16,f16,bf16}` - [0,3] for `svextq_{s32,u32,f32}` - [0,1] for `svextq_{s64,u64,f64}`
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