[AMDGPU] Fix piggybacking after commute in AMDGPULowerVGPREncoding (#183778) After successfully commuting an instruction to be compatible with the current VGPR MSB mode, update CurrentMode with the commuted instruction's mode requirements. This locks in the mode bits the commuted instruction relies on, preventing later instructions from piggybacking and corrupting those bits. Without this fix, a subsequent instruction needing a different mode could piggyback onto the preceding s_set_vgpr_msb and change mode bits that the commuted instruction depends on. For example, a nullopt src1 position (treated as 0) could be overwritten to a different value, causing incorrect register encoding for the commuted instruction. The fix still allows compatible piggybacking - instructions that only add new mode bits without changing existing ones can still piggyback.
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