)]}'
{
  "commit": "24f0901f7ef5f4f8e8ae6a2138b18e434b1b941f",
  "tree": "3bccf282f923fe15aaf559fe1eb7e2776f08cc67",
  "parents": [
    "b1ebfac1859c4fd1db3620098f6af4fd98e6174d"
  ],
  "author": {
    "name": "Julien Villette",
    "email": "julien.villette@gmail.com",
    "time": "Mon Mar 10 10:48:47 2025 +0100"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Mon Mar 10 09:48:47 2025 +0000"
  },
  "message": "[MCA] Adding missing instructions in AArch64 Neoverse V1 tests (#128892)\n\nAdded missing instructions for LLVM Opcodes coverage. It will help to\nmaintain TableGen scheduling information of AArch64 Neoverse V1.\n\nFollow up of MR ##126703\nThis is a dispatch of new instructions of the big test:\nV1-scheduling-info.s\nI have created a new test for special instructions without scheduling\ninfo in Software Optimization Guide: V1-misc-instructions.s\n\nNo more asm instruction comments to maintain.",
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