clang/lib/Headers/hexagon_protos.h

//===----------------------------------------------------------------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
// Automatically generated file, do not edit!
//===----------------------------------------------------------------------===//



#ifndef __HEXAGON_PROTOS_H_
#define __HEXAGON_PROTOS_H_ 1

/* ==========================================================================
   Assembly Syntax:       Rd32=abs(Rs32)
   C Intrinsic Prototype: Word32 Q6_R_abs_R(Word32 Rs)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_abs_R __builtin_HEXAGON_A2_abs

/* ==========================================================================
   Assembly Syntax:       Rdd32=abs(Rss32)
   C Intrinsic Prototype: Word64 Q6_P_abs_P(Word64 Rss)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_abs_P __builtin_HEXAGON_A2_absp

/* ==========================================================================
   Assembly Syntax:       Rd32=abs(Rs32):sat
   C Intrinsic Prototype: Word32 Q6_R_abs_R_sat(Word32 Rs)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_abs_R_sat __builtin_HEXAGON_A2_abssat

/* ==========================================================================
   Assembly Syntax:       Rd32=add(Rs32,Rt32)
   C Intrinsic Prototype: Word32 Q6_R_add_RR(Word32 Rs, Word32 Rt)
   Instruction Type:      ALU32_3op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_add_RR __builtin_HEXAGON_A2_add

/* ==========================================================================
   Assembly Syntax:       Rd32=add(Rt32.h,Rs32.h):<<16
   C Intrinsic Prototype: Word32 Q6_R_add_RhRh_s16(Word32 Rt, Word32 Rs)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_add_RhRh_s16 __builtin_HEXAGON_A2_addh_h16_hh

/* ==========================================================================
   Assembly Syntax:       Rd32=add(Rt32.h,Rs32.l):<<16
   C Intrinsic Prototype: Word32 Q6_R_add_RhRl_s16(Word32 Rt, Word32 Rs)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_add_RhRl_s16 __builtin_HEXAGON_A2_addh_h16_hl

/* ==========================================================================
   Assembly Syntax:       Rd32=add(Rt32.l,Rs32.h):<<16
   C Intrinsic Prototype: Word32 Q6_R_add_RlRh_s16(Word32 Rt, Word32 Rs)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_add_RlRh_s16 __builtin_HEXAGON_A2_addh_h16_lh

/* ==========================================================================
   Assembly Syntax:       Rd32=add(Rt32.l,Rs32.l):<<16
   C Intrinsic Prototype: Word32 Q6_R_add_RlRl_s16(Word32 Rt, Word32 Rs)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_add_RlRl_s16 __builtin_HEXAGON_A2_addh_h16_ll

/* ==========================================================================
   Assembly Syntax:       Rd32=add(Rt32.h,Rs32.h):sat:<<16
   C Intrinsic Prototype: Word32 Q6_R_add_RhRh_sat_s16(Word32 Rt, Word32 Rs)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_add_RhRh_sat_s16 __builtin_HEXAGON_A2_addh_h16_sat_hh

/* ==========================================================================
   Assembly Syntax:       Rd32=add(Rt32.h,Rs32.l):sat:<<16
   C Intrinsic Prototype: Word32 Q6_R_add_RhRl_sat_s16(Word32 Rt, Word32 Rs)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_add_RhRl_sat_s16 __builtin_HEXAGON_A2_addh_h16_sat_hl

/* ==========================================================================
   Assembly Syntax:       Rd32=add(Rt32.l,Rs32.h):sat:<<16
   C Intrinsic Prototype: Word32 Q6_R_add_RlRh_sat_s16(Word32 Rt, Word32 Rs)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_add_RlRh_sat_s16 __builtin_HEXAGON_A2_addh_h16_sat_lh

/* ==========================================================================
   Assembly Syntax:       Rd32=add(Rt32.l,Rs32.l):sat:<<16
   C Intrinsic Prototype: Word32 Q6_R_add_RlRl_sat_s16(Word32 Rt, Word32 Rs)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_add_RlRl_sat_s16 __builtin_HEXAGON_A2_addh_h16_sat_ll

/* ==========================================================================
   Assembly Syntax:       Rd32=add(Rt32.l,Rs32.h)
   C Intrinsic Prototype: Word32 Q6_R_add_RlRh(Word32 Rt, Word32 Rs)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_add_RlRh __builtin_HEXAGON_A2_addh_l16_hl

/* ==========================================================================
   Assembly Syntax:       Rd32=add(Rt32.l,Rs32.l)
   C Intrinsic Prototype: Word32 Q6_R_add_RlRl(Word32 Rt, Word32 Rs)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_add_RlRl __builtin_HEXAGON_A2_addh_l16_ll

/* ==========================================================================
   Assembly Syntax:       Rd32=add(Rt32.l,Rs32.h):sat
   C Intrinsic Prototype: Word32 Q6_R_add_RlRh_sat(Word32 Rt, Word32 Rs)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_add_RlRh_sat __builtin_HEXAGON_A2_addh_l16_sat_hl

/* ==========================================================================
   Assembly Syntax:       Rd32=add(Rt32.l,Rs32.l):sat
   C Intrinsic Prototype: Word32 Q6_R_add_RlRl_sat(Word32 Rt, Word32 Rs)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_add_RlRl_sat __builtin_HEXAGON_A2_addh_l16_sat_ll

/* ==========================================================================
   Assembly Syntax:       Rd32=add(Rs32,#s16)
   C Intrinsic Prototype: Word32 Q6_R_add_RI(Word32 Rs, Word32 Is16)
   Instruction Type:      ALU32_ADDI
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_add_RI __builtin_HEXAGON_A2_addi

/* ==========================================================================
   Assembly Syntax:       Rdd32=add(Rss32,Rtt32)
   C Intrinsic Prototype: Word64 Q6_P_add_PP(Word64 Rss, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_add_PP __builtin_HEXAGON_A2_addp

/* ==========================================================================
   Assembly Syntax:       Rdd32=add(Rss32,Rtt32):sat
   C Intrinsic Prototype: Word64 Q6_P_add_PP_sat(Word64 Rss, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_add_PP_sat __builtin_HEXAGON_A2_addpsat

/* ==========================================================================
   Assembly Syntax:       Rd32=add(Rs32,Rt32):sat
   C Intrinsic Prototype: Word32 Q6_R_add_RR_sat(Word32 Rs, Word32 Rt)
   Instruction Type:      ALU32_3op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_add_RR_sat __builtin_HEXAGON_A2_addsat

/* ==========================================================================
   Assembly Syntax:       Rdd32=add(Rs32,Rtt32)
   C Intrinsic Prototype: Word64 Q6_P_add_RP(Word32 Rs, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_P_add_RP __builtin_HEXAGON_A2_addsp

/* ==========================================================================
   Assembly Syntax:       Rd32=and(Rs32,Rt32)
   C Intrinsic Prototype: Word32 Q6_R_and_RR(Word32 Rs, Word32 Rt)
   Instruction Type:      ALU32_3op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_and_RR __builtin_HEXAGON_A2_and

/* ==========================================================================
   Assembly Syntax:       Rd32=and(Rs32,#s10)
   C Intrinsic Prototype: Word32 Q6_R_and_RI(Word32 Rs, Word32 Is10)
   Instruction Type:      ALU32_2op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_and_RI __builtin_HEXAGON_A2_andir

/* ==========================================================================
   Assembly Syntax:       Rdd32=and(Rss32,Rtt32)
   C Intrinsic Prototype: Word64 Q6_P_and_PP(Word64 Rss, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_and_PP __builtin_HEXAGON_A2_andp

/* ==========================================================================
   Assembly Syntax:       Rd32=aslh(Rs32)
   C Intrinsic Prototype: Word32 Q6_R_aslh_R(Word32 Rs)
   Instruction Type:      ALU32_2op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_aslh_R __builtin_HEXAGON_A2_aslh

/* ==========================================================================
   Assembly Syntax:       Rd32=asrh(Rs32)
   C Intrinsic Prototype: Word32 Q6_R_asrh_R(Word32 Rs)
   Instruction Type:      ALU32_2op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_asrh_R __builtin_HEXAGON_A2_asrh

/* ==========================================================================
   Assembly Syntax:       Rd32=combine(Rt32.h,Rs32.h)
   C Intrinsic Prototype: Word32 Q6_R_combine_RhRh(Word32 Rt, Word32 Rs)
   Instruction Type:      ALU32_3op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_combine_RhRh __builtin_HEXAGON_A2_combine_hh

/* ==========================================================================
   Assembly Syntax:       Rd32=combine(Rt32.h,Rs32.l)
   C Intrinsic Prototype: Word32 Q6_R_combine_RhRl(Word32 Rt, Word32 Rs)
   Instruction Type:      ALU32_3op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_combine_RhRl __builtin_HEXAGON_A2_combine_hl

/* ==========================================================================
   Assembly Syntax:       Rd32=combine(Rt32.l,Rs32.h)
   C Intrinsic Prototype: Word32 Q6_R_combine_RlRh(Word32 Rt, Word32 Rs)
   Instruction Type:      ALU32_3op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_combine_RlRh __builtin_HEXAGON_A2_combine_lh

/* ==========================================================================
   Assembly Syntax:       Rd32=combine(Rt32.l,Rs32.l)
   C Intrinsic Prototype: Word32 Q6_R_combine_RlRl(Word32 Rt, Word32 Rs)
   Instruction Type:      ALU32_3op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_combine_RlRl __builtin_HEXAGON_A2_combine_ll

/* ==========================================================================
   Assembly Syntax:       Rdd32=combine(#s8,#S8)
   C Intrinsic Prototype: Word64 Q6_P_combine_II(Word32 Is8, Word32 IS8)
   Instruction Type:      ALU32_2op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_P_combine_II __builtin_HEXAGON_A2_combineii

/* ==========================================================================
   Assembly Syntax:       Rdd32=combine(Rs32,Rt32)
   C Intrinsic Prototype: Word64 Q6_P_combine_RR(Word32 Rs, Word32 Rt)
   Instruction Type:      ALU32_3op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_P_combine_RR __builtin_HEXAGON_A2_combinew

/* ==========================================================================
   Assembly Syntax:       Rd32=max(Rs32,Rt32)
   C Intrinsic Prototype: Word32 Q6_R_max_RR(Word32 Rs, Word32 Rt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_max_RR __builtin_HEXAGON_A2_max

/* ==========================================================================
   Assembly Syntax:       Rdd32=max(Rss32,Rtt32)
   C Intrinsic Prototype: Word64 Q6_P_max_PP(Word64 Rss, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_max_PP __builtin_HEXAGON_A2_maxp

/* ==========================================================================
   Assembly Syntax:       Rd32=maxu(Rs32,Rt32)
   C Intrinsic Prototype: UWord32 Q6_R_maxu_RR(Word32 Rs, Word32 Rt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_maxu_RR __builtin_HEXAGON_A2_maxu

/* ==========================================================================
   Assembly Syntax:       Rdd32=maxu(Rss32,Rtt32)
   C Intrinsic Prototype: UWord64 Q6_P_maxu_PP(Word64 Rss, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_maxu_PP __builtin_HEXAGON_A2_maxup

/* ==========================================================================
   Assembly Syntax:       Rd32=min(Rt32,Rs32)
   C Intrinsic Prototype: Word32 Q6_R_min_RR(Word32 Rt, Word32 Rs)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_min_RR __builtin_HEXAGON_A2_min

/* ==========================================================================
   Assembly Syntax:       Rdd32=min(Rtt32,Rss32)
   C Intrinsic Prototype: Word64 Q6_P_min_PP(Word64 Rtt, Word64 Rss)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_min_PP __builtin_HEXAGON_A2_minp

/* ==========================================================================
   Assembly Syntax:       Rd32=minu(Rt32,Rs32)
   C Intrinsic Prototype: UWord32 Q6_R_minu_RR(Word32 Rt, Word32 Rs)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_minu_RR __builtin_HEXAGON_A2_minu

/* ==========================================================================
   Assembly Syntax:       Rdd32=minu(Rtt32,Rss32)
   C Intrinsic Prototype: UWord64 Q6_P_minu_PP(Word64 Rtt, Word64 Rss)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_minu_PP __builtin_HEXAGON_A2_minup

/* ==========================================================================
   Assembly Syntax:       Rd32=neg(Rs32)
   C Intrinsic Prototype: Word32 Q6_R_neg_R(Word32 Rs)
   Instruction Type:      ALU32_2op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_neg_R __builtin_HEXAGON_A2_neg

/* ==========================================================================
   Assembly Syntax:       Rdd32=neg(Rss32)
   C Intrinsic Prototype: Word64 Q6_P_neg_P(Word64 Rss)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_neg_P __builtin_HEXAGON_A2_negp

/* ==========================================================================
   Assembly Syntax:       Rd32=neg(Rs32):sat
   C Intrinsic Prototype: Word32 Q6_R_neg_R_sat(Word32 Rs)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_neg_R_sat __builtin_HEXAGON_A2_negsat

/* ==========================================================================
   Assembly Syntax:       Rd32=not(Rs32)
   C Intrinsic Prototype: Word32 Q6_R_not_R(Word32 Rs)
   Instruction Type:      ALU32_2op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_not_R __builtin_HEXAGON_A2_not

/* ==========================================================================
   Assembly Syntax:       Rdd32=not(Rss32)
   C Intrinsic Prototype: Word64 Q6_P_not_P(Word64 Rss)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_not_P __builtin_HEXAGON_A2_notp

/* ==========================================================================
   Assembly Syntax:       Rd32=or(Rs32,Rt32)
   C Intrinsic Prototype: Word32 Q6_R_or_RR(Word32 Rs, Word32 Rt)
   Instruction Type:      ALU32_3op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_or_RR __builtin_HEXAGON_A2_or

/* ==========================================================================
   Assembly Syntax:       Rd32=or(Rs32,#s10)
   C Intrinsic Prototype: Word32 Q6_R_or_RI(Word32 Rs, Word32 Is10)
   Instruction Type:      ALU32_2op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_or_RI __builtin_HEXAGON_A2_orir

/* ==========================================================================
   Assembly Syntax:       Rdd32=or(Rss32,Rtt32)
   C Intrinsic Prototype: Word64 Q6_P_or_PP(Word64 Rss, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_or_PP __builtin_HEXAGON_A2_orp

/* ==========================================================================
   Assembly Syntax:       Rd32=round(Rss32):sat
   C Intrinsic Prototype: Word32 Q6_R_round_P_sat(Word64 Rss)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_round_P_sat __builtin_HEXAGON_A2_roundsat

/* ==========================================================================
   Assembly Syntax:       Rd32=sat(Rss32)
   C Intrinsic Prototype: Word32 Q6_R_sat_P(Word64 Rss)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_sat_P __builtin_HEXAGON_A2_sat

/* ==========================================================================
   Assembly Syntax:       Rd32=satb(Rs32)
   C Intrinsic Prototype: Word32 Q6_R_satb_R(Word32 Rs)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_satb_R __builtin_HEXAGON_A2_satb

/* ==========================================================================
   Assembly Syntax:       Rd32=sath(Rs32)
   C Intrinsic Prototype: Word32 Q6_R_sath_R(Word32 Rs)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_sath_R __builtin_HEXAGON_A2_sath

/* ==========================================================================
   Assembly Syntax:       Rd32=satub(Rs32)
   C Intrinsic Prototype: Word32 Q6_R_satub_R(Word32 Rs)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_satub_R __builtin_HEXAGON_A2_satub

/* ==========================================================================
   Assembly Syntax:       Rd32=satuh(Rs32)
   C Intrinsic Prototype: Word32 Q6_R_satuh_R(Word32 Rs)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_satuh_R __builtin_HEXAGON_A2_satuh

/* ==========================================================================
   Assembly Syntax:       Rd32=sub(Rt32,Rs32)
   C Intrinsic Prototype: Word32 Q6_R_sub_RR(Word32 Rt, Word32 Rs)
   Instruction Type:      ALU32_3op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_sub_RR __builtin_HEXAGON_A2_sub

/* ==========================================================================
   Assembly Syntax:       Rd32=sub(Rt32.h,Rs32.h):<<16
   C Intrinsic Prototype: Word32 Q6_R_sub_RhRh_s16(Word32 Rt, Word32 Rs)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_sub_RhRh_s16 __builtin_HEXAGON_A2_subh_h16_hh

/* ==========================================================================
   Assembly Syntax:       Rd32=sub(Rt32.h,Rs32.l):<<16
   C Intrinsic Prototype: Word32 Q6_R_sub_RhRl_s16(Word32 Rt, Word32 Rs)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_sub_RhRl_s16 __builtin_HEXAGON_A2_subh_h16_hl

/* ==========================================================================
   Assembly Syntax:       Rd32=sub(Rt32.l,Rs32.h):<<16
   C Intrinsic Prototype: Word32 Q6_R_sub_RlRh_s16(Word32 Rt, Word32 Rs)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_sub_RlRh_s16 __builtin_HEXAGON_A2_subh_h16_lh

/* ==========================================================================
   Assembly Syntax:       Rd32=sub(Rt32.l,Rs32.l):<<16
   C Intrinsic Prototype: Word32 Q6_R_sub_RlRl_s16(Word32 Rt, Word32 Rs)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_sub_RlRl_s16 __builtin_HEXAGON_A2_subh_h16_ll

/* ==========================================================================
   Assembly Syntax:       Rd32=sub(Rt32.h,Rs32.h):sat:<<16
   C Intrinsic Prototype: Word32 Q6_R_sub_RhRh_sat_s16(Word32 Rt, Word32 Rs)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_sub_RhRh_sat_s16 __builtin_HEXAGON_A2_subh_h16_sat_hh

/* ==========================================================================
   Assembly Syntax:       Rd32=sub(Rt32.h,Rs32.l):sat:<<16
   C Intrinsic Prototype: Word32 Q6_R_sub_RhRl_sat_s16(Word32 Rt, Word32 Rs)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_sub_RhRl_sat_s16 __builtin_HEXAGON_A2_subh_h16_sat_hl

/* ==========================================================================
   Assembly Syntax:       Rd32=sub(Rt32.l,Rs32.h):sat:<<16
   C Intrinsic Prototype: Word32 Q6_R_sub_RlRh_sat_s16(Word32 Rt, Word32 Rs)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_sub_RlRh_sat_s16 __builtin_HEXAGON_A2_subh_h16_sat_lh

/* ==========================================================================
   Assembly Syntax:       Rd32=sub(Rt32.l,Rs32.l):sat:<<16
   C Intrinsic Prototype: Word32 Q6_R_sub_RlRl_sat_s16(Word32 Rt, Word32 Rs)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_sub_RlRl_sat_s16 __builtin_HEXAGON_A2_subh_h16_sat_ll

/* ==========================================================================
   Assembly Syntax:       Rd32=sub(Rt32.l,Rs32.h)
   C Intrinsic Prototype: Word32 Q6_R_sub_RlRh(Word32 Rt, Word32 Rs)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_sub_RlRh __builtin_HEXAGON_A2_subh_l16_hl

/* ==========================================================================
   Assembly Syntax:       Rd32=sub(Rt32.l,Rs32.l)
   C Intrinsic Prototype: Word32 Q6_R_sub_RlRl(Word32 Rt, Word32 Rs)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_sub_RlRl __builtin_HEXAGON_A2_subh_l16_ll

/* ==========================================================================
   Assembly Syntax:       Rd32=sub(Rt32.l,Rs32.h):sat
   C Intrinsic Prototype: Word32 Q6_R_sub_RlRh_sat(Word32 Rt, Word32 Rs)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_sub_RlRh_sat __builtin_HEXAGON_A2_subh_l16_sat_hl

/* ==========================================================================
   Assembly Syntax:       Rd32=sub(Rt32.l,Rs32.l):sat
   C Intrinsic Prototype: Word32 Q6_R_sub_RlRl_sat(Word32 Rt, Word32 Rs)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_sub_RlRl_sat __builtin_HEXAGON_A2_subh_l16_sat_ll

/* ==========================================================================
   Assembly Syntax:       Rdd32=sub(Rtt32,Rss32)
   C Intrinsic Prototype: Word64 Q6_P_sub_PP(Word64 Rtt, Word64 Rss)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_sub_PP __builtin_HEXAGON_A2_subp

/* ==========================================================================
   Assembly Syntax:       Rd32=sub(#s10,Rs32)
   C Intrinsic Prototype: Word32 Q6_R_sub_IR(Word32 Is10, Word32 Rs)
   Instruction Type:      ALU32_2op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_sub_IR __builtin_HEXAGON_A2_subri

/* ==========================================================================
   Assembly Syntax:       Rd32=sub(Rt32,Rs32):sat
   C Intrinsic Prototype: Word32 Q6_R_sub_RR_sat(Word32 Rt, Word32 Rs)
   Instruction Type:      ALU32_3op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_sub_RR_sat __builtin_HEXAGON_A2_subsat

/* ==========================================================================
   Assembly Syntax:       Rd32=vaddh(Rs32,Rt32)
   C Intrinsic Prototype: Word32 Q6_R_vaddh_RR(Word32 Rs, Word32 Rt)
   Instruction Type:      ALU32_3op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_vaddh_RR __builtin_HEXAGON_A2_svaddh

/* ==========================================================================
   Assembly Syntax:       Rd32=vaddh(Rs32,Rt32):sat
   C Intrinsic Prototype: Word32 Q6_R_vaddh_RR_sat(Word32 Rs, Word32 Rt)
   Instruction Type:      ALU32_3op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_vaddh_RR_sat __builtin_HEXAGON_A2_svaddhs

/* ==========================================================================
   Assembly Syntax:       Rd32=vadduh(Rs32,Rt32):sat
   C Intrinsic Prototype: Word32 Q6_R_vadduh_RR_sat(Word32 Rs, Word32 Rt)
   Instruction Type:      ALU32_3op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_vadduh_RR_sat __builtin_HEXAGON_A2_svadduhs

/* ==========================================================================
   Assembly Syntax:       Rd32=vavgh(Rs32,Rt32)
   C Intrinsic Prototype: Word32 Q6_R_vavgh_RR(Word32 Rs, Word32 Rt)
   Instruction Type:      ALU32_3op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_vavgh_RR __builtin_HEXAGON_A2_svavgh

/* ==========================================================================
   Assembly Syntax:       Rd32=vavgh(Rs32,Rt32):rnd
   C Intrinsic Prototype: Word32 Q6_R_vavgh_RR_rnd(Word32 Rs, Word32 Rt)
   Instruction Type:      ALU32_3op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_vavgh_RR_rnd __builtin_HEXAGON_A2_svavghs

/* ==========================================================================
   Assembly Syntax:       Rd32=vnavgh(Rt32,Rs32)
   C Intrinsic Prototype: Word32 Q6_R_vnavgh_RR(Word32 Rt, Word32 Rs)
   Instruction Type:      ALU32_3op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_vnavgh_RR __builtin_HEXAGON_A2_svnavgh

/* ==========================================================================
   Assembly Syntax:       Rd32=vsubh(Rt32,Rs32)
   C Intrinsic Prototype: Word32 Q6_R_vsubh_RR(Word32 Rt, Word32 Rs)
   Instruction Type:      ALU32_3op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_vsubh_RR __builtin_HEXAGON_A2_svsubh

/* ==========================================================================
   Assembly Syntax:       Rd32=vsubh(Rt32,Rs32):sat
   C Intrinsic Prototype: Word32 Q6_R_vsubh_RR_sat(Word32 Rt, Word32 Rs)
   Instruction Type:      ALU32_3op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_vsubh_RR_sat __builtin_HEXAGON_A2_svsubhs

/* ==========================================================================
   Assembly Syntax:       Rd32=vsubuh(Rt32,Rs32):sat
   C Intrinsic Prototype: Word32 Q6_R_vsubuh_RR_sat(Word32 Rt, Word32 Rs)
   Instruction Type:      ALU32_3op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_vsubuh_RR_sat __builtin_HEXAGON_A2_svsubuhs

/* ==========================================================================
   Assembly Syntax:       Rd32=swiz(Rs32)
   C Intrinsic Prototype: Word32 Q6_R_swiz_R(Word32 Rs)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_swiz_R __builtin_HEXAGON_A2_swiz

/* ==========================================================================
   Assembly Syntax:       Rd32=sxtb(Rs32)
   C Intrinsic Prototype: Word32 Q6_R_sxtb_R(Word32 Rs)
   Instruction Type:      ALU32_2op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_sxtb_R __builtin_HEXAGON_A2_sxtb

/* ==========================================================================
   Assembly Syntax:       Rd32=sxth(Rs32)
   C Intrinsic Prototype: Word32 Q6_R_sxth_R(Word32 Rs)
   Instruction Type:      ALU32_2op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_sxth_R __builtin_HEXAGON_A2_sxth

/* ==========================================================================
   Assembly Syntax:       Rdd32=sxtw(Rs32)
   C Intrinsic Prototype: Word64 Q6_P_sxtw_R(Word32 Rs)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_sxtw_R __builtin_HEXAGON_A2_sxtw

/* ==========================================================================
   Assembly Syntax:       Rd32=Rs32
   C Intrinsic Prototype: Word32 Q6_R_equals_R(Word32 Rs)
   Instruction Type:      ALU32_2op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_equals_R __builtin_HEXAGON_A2_tfr

/* ==========================================================================
   Assembly Syntax:       Rx32.h=#u16
   C Intrinsic Prototype: Word32 Q6_Rh_equals_I(Word32 Rx, Word32 Iu16)
   Instruction Type:      ALU32_2op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_Rh_equals_I __builtin_HEXAGON_A2_tfrih

/* ==========================================================================
   Assembly Syntax:       Rx32.l=#u16
   C Intrinsic Prototype: Word32 Q6_Rl_equals_I(Word32 Rx, Word32 Iu16)
   Instruction Type:      ALU32_2op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_Rl_equals_I __builtin_HEXAGON_A2_tfril

/* ==========================================================================
   Assembly Syntax:       Rdd32=Rss32
   C Intrinsic Prototype: Word64 Q6_P_equals_P(Word64 Rss)
   Instruction Type:      ALU32_2op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_P_equals_P __builtin_HEXAGON_A2_tfrp

/* ==========================================================================
   Assembly Syntax:       Rdd32=#s8
   C Intrinsic Prototype: Word64 Q6_P_equals_I(Word32 Is8)
   Instruction Type:      ALU64
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_P_equals_I __builtin_HEXAGON_A2_tfrpi

/* ==========================================================================
   Assembly Syntax:       Rd32=#s16
   C Intrinsic Prototype: Word32 Q6_R_equals_I(Word32 Is16)
   Instruction Type:      ALU32_2op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_equals_I __builtin_HEXAGON_A2_tfrsi

/* ==========================================================================
   Assembly Syntax:       Rdd32=vabsh(Rss32)
   C Intrinsic Prototype: Word64 Q6_P_vabsh_P(Word64 Rss)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vabsh_P __builtin_HEXAGON_A2_vabsh

/* ==========================================================================
   Assembly Syntax:       Rdd32=vabsh(Rss32):sat
   C Intrinsic Prototype: Word64 Q6_P_vabsh_P_sat(Word64 Rss)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vabsh_P_sat __builtin_HEXAGON_A2_vabshsat

/* ==========================================================================
   Assembly Syntax:       Rdd32=vabsw(Rss32)
   C Intrinsic Prototype: Word64 Q6_P_vabsw_P(Word64 Rss)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vabsw_P __builtin_HEXAGON_A2_vabsw

/* ==========================================================================
   Assembly Syntax:       Rdd32=vabsw(Rss32):sat
   C Intrinsic Prototype: Word64 Q6_P_vabsw_P_sat(Word64 Rss)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vabsw_P_sat __builtin_HEXAGON_A2_vabswsat

/* ==========================================================================
   Assembly Syntax:       Rdd32=vaddb(Rss32,Rtt32)
   C Intrinsic Prototype: Word64 Q6_P_vaddb_PP(Word64 Rss, Word64 Rtt)
   Instruction Type:      MAPPING
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_P_vaddb_PP __builtin_HEXAGON_A2_vaddb_map

/* ==========================================================================
   Assembly Syntax:       Rdd32=vaddh(Rss32,Rtt32)
   C Intrinsic Prototype: Word64 Q6_P_vaddh_PP(Word64 Rss, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vaddh_PP __builtin_HEXAGON_A2_vaddh

/* ==========================================================================
   Assembly Syntax:       Rdd32=vaddh(Rss32,Rtt32):sat
   C Intrinsic Prototype: Word64 Q6_P_vaddh_PP_sat(Word64 Rss, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vaddh_PP_sat __builtin_HEXAGON_A2_vaddhs

/* ==========================================================================
   Assembly Syntax:       Rdd32=vaddub(Rss32,Rtt32)
   C Intrinsic Prototype: Word64 Q6_P_vaddub_PP(Word64 Rss, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vaddub_PP __builtin_HEXAGON_A2_vaddub

/* ==========================================================================
   Assembly Syntax:       Rdd32=vaddub(Rss32,Rtt32):sat
   C Intrinsic Prototype: Word64 Q6_P_vaddub_PP_sat(Word64 Rss, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vaddub_PP_sat __builtin_HEXAGON_A2_vaddubs

/* ==========================================================================
   Assembly Syntax:       Rdd32=vadduh(Rss32,Rtt32):sat
   C Intrinsic Prototype: Word64 Q6_P_vadduh_PP_sat(Word64 Rss, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vadduh_PP_sat __builtin_HEXAGON_A2_vadduhs

/* ==========================================================================
   Assembly Syntax:       Rdd32=vaddw(Rss32,Rtt32)
   C Intrinsic Prototype: Word64 Q6_P_vaddw_PP(Word64 Rss, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vaddw_PP __builtin_HEXAGON_A2_vaddw

/* ==========================================================================
   Assembly Syntax:       Rdd32=vaddw(Rss32,Rtt32):sat
   C Intrinsic Prototype: Word64 Q6_P_vaddw_PP_sat(Word64 Rss, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vaddw_PP_sat __builtin_HEXAGON_A2_vaddws

/* ==========================================================================
   Assembly Syntax:       Rdd32=vavgh(Rss32,Rtt32)
   C Intrinsic Prototype: Word64 Q6_P_vavgh_PP(Word64 Rss, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vavgh_PP __builtin_HEXAGON_A2_vavgh

/* ==========================================================================
   Assembly Syntax:       Rdd32=vavgh(Rss32,Rtt32):crnd
   C Intrinsic Prototype: Word64 Q6_P_vavgh_PP_crnd(Word64 Rss, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vavgh_PP_crnd __builtin_HEXAGON_A2_vavghcr

/* ==========================================================================
   Assembly Syntax:       Rdd32=vavgh(Rss32,Rtt32):rnd
   C Intrinsic Prototype: Word64 Q6_P_vavgh_PP_rnd(Word64 Rss, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vavgh_PP_rnd __builtin_HEXAGON_A2_vavghr

/* ==========================================================================
   Assembly Syntax:       Rdd32=vavgub(Rss32,Rtt32)
   C Intrinsic Prototype: Word64 Q6_P_vavgub_PP(Word64 Rss, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vavgub_PP __builtin_HEXAGON_A2_vavgub

/* ==========================================================================
   Assembly Syntax:       Rdd32=vavgub(Rss32,Rtt32):rnd
   C Intrinsic Prototype: Word64 Q6_P_vavgub_PP_rnd(Word64 Rss, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vavgub_PP_rnd __builtin_HEXAGON_A2_vavgubr

/* ==========================================================================
   Assembly Syntax:       Rdd32=vavguh(Rss32,Rtt32)
   C Intrinsic Prototype: Word64 Q6_P_vavguh_PP(Word64 Rss, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vavguh_PP __builtin_HEXAGON_A2_vavguh

/* ==========================================================================
   Assembly Syntax:       Rdd32=vavguh(Rss32,Rtt32):rnd
   C Intrinsic Prototype: Word64 Q6_P_vavguh_PP_rnd(Word64 Rss, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vavguh_PP_rnd __builtin_HEXAGON_A2_vavguhr

/* ==========================================================================
   Assembly Syntax:       Rdd32=vavguw(Rss32,Rtt32)
   C Intrinsic Prototype: Word64 Q6_P_vavguw_PP(Word64 Rss, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vavguw_PP __builtin_HEXAGON_A2_vavguw

/* ==========================================================================
   Assembly Syntax:       Rdd32=vavguw(Rss32,Rtt32):rnd
   C Intrinsic Prototype: Word64 Q6_P_vavguw_PP_rnd(Word64 Rss, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vavguw_PP_rnd __builtin_HEXAGON_A2_vavguwr

/* ==========================================================================
   Assembly Syntax:       Rdd32=vavgw(Rss32,Rtt32)
   C Intrinsic Prototype: Word64 Q6_P_vavgw_PP(Word64 Rss, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vavgw_PP __builtin_HEXAGON_A2_vavgw

/* ==========================================================================
   Assembly Syntax:       Rdd32=vavgw(Rss32,Rtt32):crnd
   C Intrinsic Prototype: Word64 Q6_P_vavgw_PP_crnd(Word64 Rss, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vavgw_PP_crnd __builtin_HEXAGON_A2_vavgwcr

/* ==========================================================================
   Assembly Syntax:       Rdd32=vavgw(Rss32,Rtt32):rnd
   C Intrinsic Prototype: Word64 Q6_P_vavgw_PP_rnd(Word64 Rss, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vavgw_PP_rnd __builtin_HEXAGON_A2_vavgwr

/* ==========================================================================
   Assembly Syntax:       Pd4=vcmpb.eq(Rss32,Rtt32)
   C Intrinsic Prototype: Byte Q6_p_vcmpb_eq_PP(Word64 Rss, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_vcmpb_eq_PP __builtin_HEXAGON_A2_vcmpbeq

/* ==========================================================================
   Assembly Syntax:       Pd4=vcmpb.gtu(Rss32,Rtt32)
   C Intrinsic Prototype: Byte Q6_p_vcmpb_gtu_PP(Word64 Rss, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_vcmpb_gtu_PP __builtin_HEXAGON_A2_vcmpbgtu

/* ==========================================================================
   Assembly Syntax:       Pd4=vcmph.eq(Rss32,Rtt32)
   C Intrinsic Prototype: Byte Q6_p_vcmph_eq_PP(Word64 Rss, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_vcmph_eq_PP __builtin_HEXAGON_A2_vcmpheq

/* ==========================================================================
   Assembly Syntax:       Pd4=vcmph.gt(Rss32,Rtt32)
   C Intrinsic Prototype: Byte Q6_p_vcmph_gt_PP(Word64 Rss, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_vcmph_gt_PP __builtin_HEXAGON_A2_vcmphgt

/* ==========================================================================
   Assembly Syntax:       Pd4=vcmph.gtu(Rss32,Rtt32)
   C Intrinsic Prototype: Byte Q6_p_vcmph_gtu_PP(Word64 Rss, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_vcmph_gtu_PP __builtin_HEXAGON_A2_vcmphgtu

/* ==========================================================================
   Assembly Syntax:       Pd4=vcmpw.eq(Rss32,Rtt32)
   C Intrinsic Prototype: Byte Q6_p_vcmpw_eq_PP(Word64 Rss, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_vcmpw_eq_PP __builtin_HEXAGON_A2_vcmpweq

/* ==========================================================================
   Assembly Syntax:       Pd4=vcmpw.gt(Rss32,Rtt32)
   C Intrinsic Prototype: Byte Q6_p_vcmpw_gt_PP(Word64 Rss, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_vcmpw_gt_PP __builtin_HEXAGON_A2_vcmpwgt

/* ==========================================================================
   Assembly Syntax:       Pd4=vcmpw.gtu(Rss32,Rtt32)
   C Intrinsic Prototype: Byte Q6_p_vcmpw_gtu_PP(Word64 Rss, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_vcmpw_gtu_PP __builtin_HEXAGON_A2_vcmpwgtu

/* ==========================================================================
   Assembly Syntax:       Rdd32=vconj(Rss32):sat
   C Intrinsic Prototype: Word64 Q6_P_vconj_P_sat(Word64 Rss)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vconj_P_sat __builtin_HEXAGON_A2_vconj

/* ==========================================================================
   Assembly Syntax:       Rdd32=vmaxb(Rtt32,Rss32)
   C Intrinsic Prototype: Word64 Q6_P_vmaxb_PP(Word64 Rtt, Word64 Rss)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vmaxb_PP __builtin_HEXAGON_A2_vmaxb

/* ==========================================================================
   Assembly Syntax:       Rdd32=vmaxh(Rtt32,Rss32)
   C Intrinsic Prototype: Word64 Q6_P_vmaxh_PP(Word64 Rtt, Word64 Rss)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vmaxh_PP __builtin_HEXAGON_A2_vmaxh

/* ==========================================================================
   Assembly Syntax:       Rdd32=vmaxub(Rtt32,Rss32)
   C Intrinsic Prototype: Word64 Q6_P_vmaxub_PP(Word64 Rtt, Word64 Rss)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vmaxub_PP __builtin_HEXAGON_A2_vmaxub

/* ==========================================================================
   Assembly Syntax:       Rdd32=vmaxuh(Rtt32,Rss32)
   C Intrinsic Prototype: Word64 Q6_P_vmaxuh_PP(Word64 Rtt, Word64 Rss)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vmaxuh_PP __builtin_HEXAGON_A2_vmaxuh

/* ==========================================================================
   Assembly Syntax:       Rdd32=vmaxuw(Rtt32,Rss32)
   C Intrinsic Prototype: Word64 Q6_P_vmaxuw_PP(Word64 Rtt, Word64 Rss)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vmaxuw_PP __builtin_HEXAGON_A2_vmaxuw

/* ==========================================================================
   Assembly Syntax:       Rdd32=vmaxw(Rtt32,Rss32)
   C Intrinsic Prototype: Word64 Q6_P_vmaxw_PP(Word64 Rtt, Word64 Rss)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vmaxw_PP __builtin_HEXAGON_A2_vmaxw

/* ==========================================================================
   Assembly Syntax:       Rdd32=vminb(Rtt32,Rss32)
   C Intrinsic Prototype: Word64 Q6_P_vminb_PP(Word64 Rtt, Word64 Rss)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vminb_PP __builtin_HEXAGON_A2_vminb

/* ==========================================================================
   Assembly Syntax:       Rdd32=vminh(Rtt32,Rss32)
   C Intrinsic Prototype: Word64 Q6_P_vminh_PP(Word64 Rtt, Word64 Rss)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vminh_PP __builtin_HEXAGON_A2_vminh

/* ==========================================================================
   Assembly Syntax:       Rdd32=vminub(Rtt32,Rss32)
   C Intrinsic Prototype: Word64 Q6_P_vminub_PP(Word64 Rtt, Word64 Rss)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vminub_PP __builtin_HEXAGON_A2_vminub

/* ==========================================================================
   Assembly Syntax:       Rdd32=vminuh(Rtt32,Rss32)
   C Intrinsic Prototype: Word64 Q6_P_vminuh_PP(Word64 Rtt, Word64 Rss)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vminuh_PP __builtin_HEXAGON_A2_vminuh

/* ==========================================================================
   Assembly Syntax:       Rdd32=vminuw(Rtt32,Rss32)
   C Intrinsic Prototype: Word64 Q6_P_vminuw_PP(Word64 Rtt, Word64 Rss)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vminuw_PP __builtin_HEXAGON_A2_vminuw

/* ==========================================================================
   Assembly Syntax:       Rdd32=vminw(Rtt32,Rss32)
   C Intrinsic Prototype: Word64 Q6_P_vminw_PP(Word64 Rtt, Word64 Rss)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vminw_PP __builtin_HEXAGON_A2_vminw

/* ==========================================================================
   Assembly Syntax:       Rdd32=vnavgh(Rtt32,Rss32)
   C Intrinsic Prototype: Word64 Q6_P_vnavgh_PP(Word64 Rtt, Word64 Rss)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vnavgh_PP __builtin_HEXAGON_A2_vnavgh

/* ==========================================================================
   Assembly Syntax:       Rdd32=vnavgh(Rtt32,Rss32):crnd:sat
   C Intrinsic Prototype: Word64 Q6_P_vnavgh_PP_crnd_sat(Word64 Rtt, Word64 Rss)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vnavgh_PP_crnd_sat __builtin_HEXAGON_A2_vnavghcr

/* ==========================================================================
   Assembly Syntax:       Rdd32=vnavgh(Rtt32,Rss32):rnd:sat
   C Intrinsic Prototype: Word64 Q6_P_vnavgh_PP_rnd_sat(Word64 Rtt, Word64 Rss)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vnavgh_PP_rnd_sat __builtin_HEXAGON_A2_vnavghr

/* ==========================================================================
   Assembly Syntax:       Rdd32=vnavgw(Rtt32,Rss32)
   C Intrinsic Prototype: Word64 Q6_P_vnavgw_PP(Word64 Rtt, Word64 Rss)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vnavgw_PP __builtin_HEXAGON_A2_vnavgw

/* ==========================================================================
   Assembly Syntax:       Rdd32=vnavgw(Rtt32,Rss32):crnd:sat
   C Intrinsic Prototype: Word64 Q6_P_vnavgw_PP_crnd_sat(Word64 Rtt, Word64 Rss)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vnavgw_PP_crnd_sat __builtin_HEXAGON_A2_vnavgwcr

/* ==========================================================================
   Assembly Syntax:       Rdd32=vnavgw(Rtt32,Rss32):rnd:sat
   C Intrinsic Prototype: Word64 Q6_P_vnavgw_PP_rnd_sat(Word64 Rtt, Word64 Rss)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vnavgw_PP_rnd_sat __builtin_HEXAGON_A2_vnavgwr

/* ==========================================================================
   Assembly Syntax:       Rdd32=vraddub(Rss32,Rtt32)
   C Intrinsic Prototype: Word64 Q6_P_vraddub_PP(Word64 Rss, Word64 Rtt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vraddub_PP __builtin_HEXAGON_A2_vraddub

/* ==========================================================================
   Assembly Syntax:       Rxx32+=vraddub(Rss32,Rtt32)
   C Intrinsic Prototype: Word64 Q6_P_vraddubacc_PP(Word64 Rxx, Word64 Rss, Word64 Rtt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vraddubacc_PP __builtin_HEXAGON_A2_vraddub_acc

/* ==========================================================================
   Assembly Syntax:       Rdd32=vrsadub(Rss32,Rtt32)
   C Intrinsic Prototype: Word64 Q6_P_vrsadub_PP(Word64 Rss, Word64 Rtt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vrsadub_PP __builtin_HEXAGON_A2_vrsadub

/* ==========================================================================
   Assembly Syntax:       Rxx32+=vrsadub(Rss32,Rtt32)
   C Intrinsic Prototype: Word64 Q6_P_vrsadubacc_PP(Word64 Rxx, Word64 Rss, Word64 Rtt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vrsadubacc_PP __builtin_HEXAGON_A2_vrsadub_acc

/* ==========================================================================
   Assembly Syntax:       Rdd32=vsubb(Rss32,Rtt32)
   C Intrinsic Prototype: Word64 Q6_P_vsubb_PP(Word64 Rss, Word64 Rtt)
   Instruction Type:      MAPPING
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_P_vsubb_PP __builtin_HEXAGON_A2_vsubb_map

/* ==========================================================================
   Assembly Syntax:       Rdd32=vsubh(Rtt32,Rss32)
   C Intrinsic Prototype: Word64 Q6_P_vsubh_PP(Word64 Rtt, Word64 Rss)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vsubh_PP __builtin_HEXAGON_A2_vsubh

/* ==========================================================================
   Assembly Syntax:       Rdd32=vsubh(Rtt32,Rss32):sat
   C Intrinsic Prototype: Word64 Q6_P_vsubh_PP_sat(Word64 Rtt, Word64 Rss)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vsubh_PP_sat __builtin_HEXAGON_A2_vsubhs

/* ==========================================================================
   Assembly Syntax:       Rdd32=vsubub(Rtt32,Rss32)
   C Intrinsic Prototype: Word64 Q6_P_vsubub_PP(Word64 Rtt, Word64 Rss)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vsubub_PP __builtin_HEXAGON_A2_vsubub

/* ==========================================================================
   Assembly Syntax:       Rdd32=vsubub(Rtt32,Rss32):sat
   C Intrinsic Prototype: Word64 Q6_P_vsubub_PP_sat(Word64 Rtt, Word64 Rss)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vsubub_PP_sat __builtin_HEXAGON_A2_vsububs

/* ==========================================================================
   Assembly Syntax:       Rdd32=vsubuh(Rtt32,Rss32):sat
   C Intrinsic Prototype: Word64 Q6_P_vsubuh_PP_sat(Word64 Rtt, Word64 Rss)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vsubuh_PP_sat __builtin_HEXAGON_A2_vsubuhs

/* ==========================================================================
   Assembly Syntax:       Rdd32=vsubw(Rtt32,Rss32)
   C Intrinsic Prototype: Word64 Q6_P_vsubw_PP(Word64 Rtt, Word64 Rss)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vsubw_PP __builtin_HEXAGON_A2_vsubw

/* ==========================================================================
   Assembly Syntax:       Rdd32=vsubw(Rtt32,Rss32):sat
   C Intrinsic Prototype: Word64 Q6_P_vsubw_PP_sat(Word64 Rtt, Word64 Rss)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vsubw_PP_sat __builtin_HEXAGON_A2_vsubws

/* ==========================================================================
   Assembly Syntax:       Rd32=xor(Rs32,Rt32)
   C Intrinsic Prototype: Word32 Q6_R_xor_RR(Word32 Rs, Word32 Rt)
   Instruction Type:      ALU32_3op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_xor_RR __builtin_HEXAGON_A2_xor

/* ==========================================================================
   Assembly Syntax:       Rdd32=xor(Rss32,Rtt32)
   C Intrinsic Prototype: Word64 Q6_P_xor_PP(Word64 Rss, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_xor_PP __builtin_HEXAGON_A2_xorp

/* ==========================================================================
   Assembly Syntax:       Rd32=zxtb(Rs32)
   C Intrinsic Prototype: Word32 Q6_R_zxtb_R(Word32 Rs)
   Instruction Type:      ALU32_2op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_zxtb_R __builtin_HEXAGON_A2_zxtb

/* ==========================================================================
   Assembly Syntax:       Rd32=zxth(Rs32)
   C Intrinsic Prototype: Word32 Q6_R_zxth_R(Word32 Rs)
   Instruction Type:      ALU32_2op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_zxth_R __builtin_HEXAGON_A2_zxth

/* ==========================================================================
   Assembly Syntax:       Rd32=and(Rt32,~Rs32)
   C Intrinsic Prototype: Word32 Q6_R_and_RnR(Word32 Rt, Word32 Rs)
   Instruction Type:      ALU32_3op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_and_RnR __builtin_HEXAGON_A4_andn

/* ==========================================================================
   Assembly Syntax:       Rdd32=and(Rtt32,~Rss32)
   C Intrinsic Prototype: Word64 Q6_P_and_PnP(Word64 Rtt, Word64 Rss)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_and_PnP __builtin_HEXAGON_A4_andnp

/* ==========================================================================
   Assembly Syntax:       Rdd32=bitsplit(Rs32,Rt32)
   C Intrinsic Prototype: Word64 Q6_P_bitsplit_RR(Word32 Rs, Word32 Rt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_bitsplit_RR __builtin_HEXAGON_A4_bitsplit

/* ==========================================================================
   Assembly Syntax:       Rdd32=bitsplit(Rs32,#u5)
   C Intrinsic Prototype: Word64 Q6_P_bitsplit_RI(Word32 Rs, Word32 Iu5)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_bitsplit_RI __builtin_HEXAGON_A4_bitspliti

/* ==========================================================================
   Assembly Syntax:       Pd4=boundscheck(Rs32,Rtt32)
   C Intrinsic Prototype: Byte Q6_p_boundscheck_RP(Word32 Rs, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_p_boundscheck_RP __builtin_HEXAGON_A4_boundscheck

/* ==========================================================================
   Assembly Syntax:       Pd4=cmpb.eq(Rs32,Rt32)
   C Intrinsic Prototype: Byte Q6_p_cmpb_eq_RR(Word32 Rs, Word32 Rt)
   Instruction Type:      S_3op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_cmpb_eq_RR __builtin_HEXAGON_A4_cmpbeq

/* ==========================================================================
   Assembly Syntax:       Pd4=cmpb.eq(Rs32,#u8)
   C Intrinsic Prototype: Byte Q6_p_cmpb_eq_RI(Word32 Rs, Word32 Iu8)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_cmpb_eq_RI __builtin_HEXAGON_A4_cmpbeqi

/* ==========================================================================
   Assembly Syntax:       Pd4=cmpb.gt(Rs32,Rt32)
   C Intrinsic Prototype: Byte Q6_p_cmpb_gt_RR(Word32 Rs, Word32 Rt)
   Instruction Type:      S_3op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_cmpb_gt_RR __builtin_HEXAGON_A4_cmpbgt

/* ==========================================================================
   Assembly Syntax:       Pd4=cmpb.gt(Rs32,#s8)
   C Intrinsic Prototype: Byte Q6_p_cmpb_gt_RI(Word32 Rs, Word32 Is8)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_cmpb_gt_RI __builtin_HEXAGON_A4_cmpbgti

/* ==========================================================================
   Assembly Syntax:       Pd4=cmpb.gtu(Rs32,Rt32)
   C Intrinsic Prototype: Byte Q6_p_cmpb_gtu_RR(Word32 Rs, Word32 Rt)
   Instruction Type:      S_3op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_cmpb_gtu_RR __builtin_HEXAGON_A4_cmpbgtu

/* ==========================================================================
   Assembly Syntax:       Pd4=cmpb.gtu(Rs32,#u7)
   C Intrinsic Prototype: Byte Q6_p_cmpb_gtu_RI(Word32 Rs, Word32 Iu7)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_cmpb_gtu_RI __builtin_HEXAGON_A4_cmpbgtui

/* ==========================================================================
   Assembly Syntax:       Pd4=cmph.eq(Rs32,Rt32)
   C Intrinsic Prototype: Byte Q6_p_cmph_eq_RR(Word32 Rs, Word32 Rt)
   Instruction Type:      S_3op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_cmph_eq_RR __builtin_HEXAGON_A4_cmpheq

/* ==========================================================================
   Assembly Syntax:       Pd4=cmph.eq(Rs32,#s8)
   C Intrinsic Prototype: Byte Q6_p_cmph_eq_RI(Word32 Rs, Word32 Is8)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_cmph_eq_RI __builtin_HEXAGON_A4_cmpheqi

/* ==========================================================================
   Assembly Syntax:       Pd4=cmph.gt(Rs32,Rt32)
   C Intrinsic Prototype: Byte Q6_p_cmph_gt_RR(Word32 Rs, Word32 Rt)
   Instruction Type:      S_3op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_cmph_gt_RR __builtin_HEXAGON_A4_cmphgt

/* ==========================================================================
   Assembly Syntax:       Pd4=cmph.gt(Rs32,#s8)
   C Intrinsic Prototype: Byte Q6_p_cmph_gt_RI(Word32 Rs, Word32 Is8)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_cmph_gt_RI __builtin_HEXAGON_A4_cmphgti

/* ==========================================================================
   Assembly Syntax:       Pd4=cmph.gtu(Rs32,Rt32)
   C Intrinsic Prototype: Byte Q6_p_cmph_gtu_RR(Word32 Rs, Word32 Rt)
   Instruction Type:      S_3op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_cmph_gtu_RR __builtin_HEXAGON_A4_cmphgtu

/* ==========================================================================
   Assembly Syntax:       Pd4=cmph.gtu(Rs32,#u7)
   C Intrinsic Prototype: Byte Q6_p_cmph_gtu_RI(Word32 Rs, Word32 Iu7)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_cmph_gtu_RI __builtin_HEXAGON_A4_cmphgtui

/* ==========================================================================
   Assembly Syntax:       Rdd32=combine(#s8,Rs32)
   C Intrinsic Prototype: Word64 Q6_P_combine_IR(Word32 Is8, Word32 Rs)
   Instruction Type:      ALU32_2op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_P_combine_IR __builtin_HEXAGON_A4_combineir

/* ==========================================================================
   Assembly Syntax:       Rdd32=combine(Rs32,#s8)
   C Intrinsic Prototype: Word64 Q6_P_combine_RI(Word32 Rs, Word32 Is8)
   Instruction Type:      ALU32_2op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_P_combine_RI __builtin_HEXAGON_A4_combineri

/* ==========================================================================
   Assembly Syntax:       Rd32=cround(Rs32,#u5)
   C Intrinsic Prototype: Word32 Q6_R_cround_RI(Word32 Rs, Word32 Iu5)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_cround_RI __builtin_HEXAGON_A4_cround_ri

/* ==========================================================================
   Assembly Syntax:       Rd32=cround(Rs32,Rt32)
   C Intrinsic Prototype: Word32 Q6_R_cround_RR(Word32 Rs, Word32 Rt)
   Instruction Type:      S_3op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_cround_RR __builtin_HEXAGON_A4_cround_rr

/* ==========================================================================
   Assembly Syntax:       Rd32=modwrap(Rs32,Rt32)
   C Intrinsic Prototype: Word32 Q6_R_modwrap_RR(Word32 Rs, Word32 Rt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_modwrap_RR __builtin_HEXAGON_A4_modwrapu

/* ==========================================================================
   Assembly Syntax:       Rd32=or(Rt32,~Rs32)
   C Intrinsic Prototype: Word32 Q6_R_or_RnR(Word32 Rt, Word32 Rs)
   Instruction Type:      ALU32_3op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_or_RnR __builtin_HEXAGON_A4_orn

/* ==========================================================================
   Assembly Syntax:       Rdd32=or(Rtt32,~Rss32)
   C Intrinsic Prototype: Word64 Q6_P_or_PnP(Word64 Rtt, Word64 Rss)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_or_PnP __builtin_HEXAGON_A4_ornp

/* ==========================================================================
   Assembly Syntax:       Rd32=cmp.eq(Rs32,Rt32)
   C Intrinsic Prototype: Word32 Q6_R_cmp_eq_RR(Word32 Rs, Word32 Rt)
   Instruction Type:      ALU32_3op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_cmp_eq_RR __builtin_HEXAGON_A4_rcmpeq

/* ==========================================================================
   Assembly Syntax:       Rd32=cmp.eq(Rs32,#s8)
   C Intrinsic Prototype: Word32 Q6_R_cmp_eq_RI(Word32 Rs, Word32 Is8)
   Instruction Type:      ALU32_2op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_cmp_eq_RI __builtin_HEXAGON_A4_rcmpeqi

/* ==========================================================================
   Assembly Syntax:       Rd32=!cmp.eq(Rs32,Rt32)
   C Intrinsic Prototype: Word32 Q6_R_not_cmp_eq_RR(Word32 Rs, Word32 Rt)
   Instruction Type:      ALU32_3op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_not_cmp_eq_RR __builtin_HEXAGON_A4_rcmpneq

/* ==========================================================================
   Assembly Syntax:       Rd32=!cmp.eq(Rs32,#s8)
   C Intrinsic Prototype: Word32 Q6_R_not_cmp_eq_RI(Word32 Rs, Word32 Is8)
   Instruction Type:      ALU32_2op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_not_cmp_eq_RI __builtin_HEXAGON_A4_rcmpneqi

/* ==========================================================================
   Assembly Syntax:       Rd32=round(Rs32,#u5)
   C Intrinsic Prototype: Word32 Q6_R_round_RI(Word32 Rs, Word32 Iu5)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_round_RI __builtin_HEXAGON_A4_round_ri

/* ==========================================================================
   Assembly Syntax:       Rd32=round(Rs32,#u5):sat
   C Intrinsic Prototype: Word32 Q6_R_round_RI_sat(Word32 Rs, Word32 Iu5)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_round_RI_sat __builtin_HEXAGON_A4_round_ri_sat

/* ==========================================================================
   Assembly Syntax:       Rd32=round(Rs32,Rt32)
   C Intrinsic Prototype: Word32 Q6_R_round_RR(Word32 Rs, Word32 Rt)
   Instruction Type:      S_3op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_round_RR __builtin_HEXAGON_A4_round_rr

/* ==========================================================================
   Assembly Syntax:       Rd32=round(Rs32,Rt32):sat
   C Intrinsic Prototype: Word32 Q6_R_round_RR_sat(Word32 Rs, Word32 Rt)
   Instruction Type:      S_3op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_round_RR_sat __builtin_HEXAGON_A4_round_rr_sat

/* ==========================================================================
   Assembly Syntax:       Pd4=tlbmatch(Rss32,Rt32)
   C Intrinsic Prototype: Byte Q6_p_tlbmatch_PR(Word64 Rss, Word32 Rt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_tlbmatch_PR __builtin_HEXAGON_A4_tlbmatch

/* ==========================================================================
   Assembly Syntax:       Pd4=any8(vcmpb.eq(Rss32,Rtt32))
   C Intrinsic Prototype: Byte Q6_p_any8_vcmpb_eq_PP(Word64 Rss, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_any8_vcmpb_eq_PP __builtin_HEXAGON_A4_vcmpbeq_any

/* ==========================================================================
   Assembly Syntax:       Pd4=vcmpb.eq(Rss32,#u8)
   C Intrinsic Prototype: Byte Q6_p_vcmpb_eq_PI(Word64 Rss, Word32 Iu8)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_vcmpb_eq_PI __builtin_HEXAGON_A4_vcmpbeqi

/* ==========================================================================
   Assembly Syntax:       Pd4=vcmpb.gt(Rss32,Rtt32)
   C Intrinsic Prototype: Byte Q6_p_vcmpb_gt_PP(Word64 Rss, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_vcmpb_gt_PP __builtin_HEXAGON_A4_vcmpbgt

/* ==========================================================================
   Assembly Syntax:       Pd4=vcmpb.gt(Rss32,#s8)
   C Intrinsic Prototype: Byte Q6_p_vcmpb_gt_PI(Word64 Rss, Word32 Is8)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_vcmpb_gt_PI __builtin_HEXAGON_A4_vcmpbgti

/* ==========================================================================
   Assembly Syntax:       Pd4=vcmpb.gtu(Rss32,#u7)
   C Intrinsic Prototype: Byte Q6_p_vcmpb_gtu_PI(Word64 Rss, Word32 Iu7)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_vcmpb_gtu_PI __builtin_HEXAGON_A4_vcmpbgtui

/* ==========================================================================
   Assembly Syntax:       Pd4=vcmph.eq(Rss32,#s8)
   C Intrinsic Prototype: Byte Q6_p_vcmph_eq_PI(Word64 Rss, Word32 Is8)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_vcmph_eq_PI __builtin_HEXAGON_A4_vcmpheqi

/* ==========================================================================
   Assembly Syntax:       Pd4=vcmph.gt(Rss32,#s8)
   C Intrinsic Prototype: Byte Q6_p_vcmph_gt_PI(Word64 Rss, Word32 Is8)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_vcmph_gt_PI __builtin_HEXAGON_A4_vcmphgti

/* ==========================================================================
   Assembly Syntax:       Pd4=vcmph.gtu(Rss32,#u7)
   C Intrinsic Prototype: Byte Q6_p_vcmph_gtu_PI(Word64 Rss, Word32 Iu7)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_vcmph_gtu_PI __builtin_HEXAGON_A4_vcmphgtui

/* ==========================================================================
   Assembly Syntax:       Pd4=vcmpw.eq(Rss32,#s8)
   C Intrinsic Prototype: Byte Q6_p_vcmpw_eq_PI(Word64 Rss, Word32 Is8)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_vcmpw_eq_PI __builtin_HEXAGON_A4_vcmpweqi

/* ==========================================================================
   Assembly Syntax:       Pd4=vcmpw.gt(Rss32,#s8)
   C Intrinsic Prototype: Byte Q6_p_vcmpw_gt_PI(Word64 Rss, Word32 Is8)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_vcmpw_gt_PI __builtin_HEXAGON_A4_vcmpwgti

/* ==========================================================================
   Assembly Syntax:       Pd4=vcmpw.gtu(Rss32,#u7)
   C Intrinsic Prototype: Byte Q6_p_vcmpw_gtu_PI(Word64 Rss, Word32 Iu7)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_vcmpw_gtu_PI __builtin_HEXAGON_A4_vcmpwgtui

/* ==========================================================================
   Assembly Syntax:       Rxx32=vrmaxh(Rss32,Ru32)
   C Intrinsic Prototype: Word64 Q6_P_vrmaxh_PR(Word64 Rxx, Word64 Rss, Word32 Ru)
   Instruction Type:      S_3op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vrmaxh_PR __builtin_HEXAGON_A4_vrmaxh

/* ==========================================================================
   Assembly Syntax:       Rxx32=vrmaxuh(Rss32,Ru32)
   C Intrinsic Prototype: Word64 Q6_P_vrmaxuh_PR(Word64 Rxx, Word64 Rss, Word32 Ru)
   Instruction Type:      S_3op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vrmaxuh_PR __builtin_HEXAGON_A4_vrmaxuh

/* ==========================================================================
   Assembly Syntax:       Rxx32=vrmaxuw(Rss32,Ru32)
   C Intrinsic Prototype: Word64 Q6_P_vrmaxuw_PR(Word64 Rxx, Word64 Rss, Word32 Ru)
   Instruction Type:      S_3op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vrmaxuw_PR __builtin_HEXAGON_A4_vrmaxuw

/* ==========================================================================
   Assembly Syntax:       Rxx32=vrmaxw(Rss32,Ru32)
   C Intrinsic Prototype: Word64 Q6_P_vrmaxw_PR(Word64 Rxx, Word64 Rss, Word32 Ru)
   Instruction Type:      S_3op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vrmaxw_PR __builtin_HEXAGON_A4_vrmaxw

/* ==========================================================================
   Assembly Syntax:       Rxx32=vrminh(Rss32,Ru32)
   C Intrinsic Prototype: Word64 Q6_P_vrminh_PR(Word64 Rxx, Word64 Rss, Word32 Ru)
   Instruction Type:      S_3op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vrminh_PR __builtin_HEXAGON_A4_vrminh

/* ==========================================================================
   Assembly Syntax:       Rxx32=vrminuh(Rss32,Ru32)
   C Intrinsic Prototype: Word64 Q6_P_vrminuh_PR(Word64 Rxx, Word64 Rss, Word32 Ru)
   Instruction Type:      S_3op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vrminuh_PR __builtin_HEXAGON_A4_vrminuh

/* ==========================================================================
   Assembly Syntax:       Rxx32=vrminuw(Rss32,Ru32)
   C Intrinsic Prototype: Word64 Q6_P_vrminuw_PR(Word64 Rxx, Word64 Rss, Word32 Ru)
   Instruction Type:      S_3op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vrminuw_PR __builtin_HEXAGON_A4_vrminuw

/* ==========================================================================
   Assembly Syntax:       Rxx32=vrminw(Rss32,Ru32)
   C Intrinsic Prototype: Word64 Q6_P_vrminw_PR(Word64 Rxx, Word64 Rss, Word32 Ru)
   Instruction Type:      S_3op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vrminw_PR __builtin_HEXAGON_A4_vrminw

/* ==========================================================================
   Assembly Syntax:       Rd32=vaddhub(Rss32,Rtt32):sat
   C Intrinsic Prototype: Word32 Q6_R_vaddhub_PP_sat(Word64 Rss, Word64 Rtt)
   Instruction Type:      S_3op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_vaddhub_PP_sat __builtin_HEXAGON_A5_vaddhubs

/* ==========================================================================
   Assembly Syntax:       Pd4=all8(Ps4)
   C Intrinsic Prototype: Byte Q6_p_all8_p(Byte Ps)
   Instruction Type:      CR
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_all8_p __builtin_HEXAGON_C2_all8

/* ==========================================================================
   Assembly Syntax:       Pd4=and(Pt4,Ps4)
   C Intrinsic Prototype: Byte Q6_p_and_pp(Byte Pt, Byte Ps)
   Instruction Type:      CR
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_and_pp __builtin_HEXAGON_C2_and

/* ==========================================================================
   Assembly Syntax:       Pd4=and(Pt4,!Ps4)
   C Intrinsic Prototype: Byte Q6_p_and_pnp(Byte Pt, Byte Ps)
   Instruction Type:      CR
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_and_pnp __builtin_HEXAGON_C2_andn

/* ==========================================================================
   Assembly Syntax:       Pd4=any8(Ps4)
   C Intrinsic Prototype: Byte Q6_p_any8_p(Byte Ps)
   Instruction Type:      CR
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_any8_p __builtin_HEXAGON_C2_any8

/* ==========================================================================
   Assembly Syntax:       Pd4=bitsclr(Rs32,Rt32)
   C Intrinsic Prototype: Byte Q6_p_bitsclr_RR(Word32 Rs, Word32 Rt)
   Instruction Type:      S_3op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_bitsclr_RR __builtin_HEXAGON_C2_bitsclr

/* ==========================================================================
   Assembly Syntax:       Pd4=bitsclr(Rs32,#u6)
   C Intrinsic Prototype: Byte Q6_p_bitsclr_RI(Word32 Rs, Word32 Iu6)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_bitsclr_RI __builtin_HEXAGON_C2_bitsclri

/* ==========================================================================
   Assembly Syntax:       Pd4=bitsset(Rs32,Rt32)
   C Intrinsic Prototype: Byte Q6_p_bitsset_RR(Word32 Rs, Word32 Rt)
   Instruction Type:      S_3op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_bitsset_RR __builtin_HEXAGON_C2_bitsset

/* ==========================================================================
   Assembly Syntax:       Pd4=cmp.eq(Rs32,Rt32)
   C Intrinsic Prototype: Byte Q6_p_cmp_eq_RR(Word32 Rs, Word32 Rt)
   Instruction Type:      ALU32_3op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_p_cmp_eq_RR __builtin_HEXAGON_C2_cmpeq

/* ==========================================================================
   Assembly Syntax:       Pd4=cmp.eq(Rs32,#s10)
   C Intrinsic Prototype: Byte Q6_p_cmp_eq_RI(Word32 Rs, Word32 Is10)
   Instruction Type:      ALU32_2op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_p_cmp_eq_RI __builtin_HEXAGON_C2_cmpeqi

/* ==========================================================================
   Assembly Syntax:       Pd4=cmp.eq(Rss32,Rtt32)
   C Intrinsic Prototype: Byte Q6_p_cmp_eq_PP(Word64 Rss, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_cmp_eq_PP __builtin_HEXAGON_C2_cmpeqp

/* ==========================================================================
   Assembly Syntax:       Pd4=cmp.ge(Rs32,#s8)
   C Intrinsic Prototype: Byte Q6_p_cmp_ge_RI(Word32 Rs, Word32 Is8)
   Instruction Type:      ALU32_2op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_p_cmp_ge_RI __builtin_HEXAGON_C2_cmpgei

/* ==========================================================================
   Assembly Syntax:       Pd4=cmp.geu(Rs32,#u8)
   C Intrinsic Prototype: Byte Q6_p_cmp_geu_RI(Word32 Rs, Word32 Iu8)
   Instruction Type:      ALU32_2op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_p_cmp_geu_RI __builtin_HEXAGON_C2_cmpgeui

/* ==========================================================================
   Assembly Syntax:       Pd4=cmp.gt(Rs32,Rt32)
   C Intrinsic Prototype: Byte Q6_p_cmp_gt_RR(Word32 Rs, Word32 Rt)
   Instruction Type:      ALU32_3op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_p_cmp_gt_RR __builtin_HEXAGON_C2_cmpgt

/* ==========================================================================
   Assembly Syntax:       Pd4=cmp.gt(Rs32,#s10)
   C Intrinsic Prototype: Byte Q6_p_cmp_gt_RI(Word32 Rs, Word32 Is10)
   Instruction Type:      ALU32_2op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_p_cmp_gt_RI __builtin_HEXAGON_C2_cmpgti

/* ==========================================================================
   Assembly Syntax:       Pd4=cmp.gt(Rss32,Rtt32)
   C Intrinsic Prototype: Byte Q6_p_cmp_gt_PP(Word64 Rss, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_cmp_gt_PP __builtin_HEXAGON_C2_cmpgtp

/* ==========================================================================
   Assembly Syntax:       Pd4=cmp.gtu(Rs32,Rt32)
   C Intrinsic Prototype: Byte Q6_p_cmp_gtu_RR(Word32 Rs, Word32 Rt)
   Instruction Type:      ALU32_3op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_p_cmp_gtu_RR __builtin_HEXAGON_C2_cmpgtu

/* ==========================================================================
   Assembly Syntax:       Pd4=cmp.gtu(Rs32,#u9)
   C Intrinsic Prototype: Byte Q6_p_cmp_gtu_RI(Word32 Rs, Word32 Iu9)
   Instruction Type:      ALU32_2op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_p_cmp_gtu_RI __builtin_HEXAGON_C2_cmpgtui

/* ==========================================================================
   Assembly Syntax:       Pd4=cmp.gtu(Rss32,Rtt32)
   C Intrinsic Prototype: Byte Q6_p_cmp_gtu_PP(Word64 Rss, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_cmp_gtu_PP __builtin_HEXAGON_C2_cmpgtup

/* ==========================================================================
   Assembly Syntax:       Pd4=cmp.lt(Rs32,Rt32)
   C Intrinsic Prototype: Byte Q6_p_cmp_lt_RR(Word32 Rs, Word32 Rt)
   Instruction Type:      ALU32_3op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_p_cmp_lt_RR __builtin_HEXAGON_C2_cmplt

/* ==========================================================================
   Assembly Syntax:       Pd4=cmp.ltu(Rs32,Rt32)
   C Intrinsic Prototype: Byte Q6_p_cmp_ltu_RR(Word32 Rs, Word32 Rt)
   Instruction Type:      ALU32_3op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_p_cmp_ltu_RR __builtin_HEXAGON_C2_cmpltu

/* ==========================================================================
   Assembly Syntax:       Rdd32=mask(Pt4)
   C Intrinsic Prototype: Word64 Q6_P_mask_p(Byte Pt)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_mask_p __builtin_HEXAGON_C2_mask

/* ==========================================================================
   Assembly Syntax:       Rd32=mux(Pu4,Rs32,Rt32)
   C Intrinsic Prototype: Word32 Q6_R_mux_pRR(Byte Pu, Word32 Rs, Word32 Rt)
   Instruction Type:      ALU32_3op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_mux_pRR __builtin_HEXAGON_C2_mux

/* ==========================================================================
   Assembly Syntax:       Rd32=mux(Pu4,#s8,#S8)
   C Intrinsic Prototype: Word32 Q6_R_mux_pII(Byte Pu, Word32 Is8, Word32 IS8)
   Instruction Type:      ALU32_2op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_mux_pII __builtin_HEXAGON_C2_muxii

/* ==========================================================================
   Assembly Syntax:       Rd32=mux(Pu4,Rs32,#s8)
   C Intrinsic Prototype: Word32 Q6_R_mux_pRI(Byte Pu, Word32 Rs, Word32 Is8)
   Instruction Type:      ALU32_2op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_mux_pRI __builtin_HEXAGON_C2_muxir

/* ==========================================================================
   Assembly Syntax:       Rd32=mux(Pu4,#s8,Rs32)
   C Intrinsic Prototype: Word32 Q6_R_mux_pIR(Byte Pu, Word32 Is8, Word32 Rs)
   Instruction Type:      ALU32_2op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_R_mux_pIR __builtin_HEXAGON_C2_muxri

/* ==========================================================================
   Assembly Syntax:       Pd4=not(Ps4)
   C Intrinsic Prototype: Byte Q6_p_not_p(Byte Ps)
   Instruction Type:      CR
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_not_p __builtin_HEXAGON_C2_not

/* ==========================================================================
   Assembly Syntax:       Pd4=or(Pt4,Ps4)
   C Intrinsic Prototype: Byte Q6_p_or_pp(Byte Pt, Byte Ps)
   Instruction Type:      CR
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_or_pp __builtin_HEXAGON_C2_or

/* ==========================================================================
   Assembly Syntax:       Pd4=or(Pt4,!Ps4)
   C Intrinsic Prototype: Byte Q6_p_or_pnp(Byte Pt, Byte Ps)
   Instruction Type:      CR
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_or_pnp __builtin_HEXAGON_C2_orn

/* ==========================================================================
   Assembly Syntax:       Pd4=Ps4
   C Intrinsic Prototype: Byte Q6_p_equals_p(Byte Ps)
   Instruction Type:      MAPPING
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_p_equals_p __builtin_HEXAGON_C2_pxfer_map

/* ==========================================================================
   Assembly Syntax:       Rd32=Ps4
   C Intrinsic Prototype: Word32 Q6_R_equals_p(Byte Ps)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_equals_p __builtin_HEXAGON_C2_tfrpr

/* ==========================================================================
   Assembly Syntax:       Pd4=Rs32
   C Intrinsic Prototype: Byte Q6_p_equals_R(Word32 Rs)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_equals_R __builtin_HEXAGON_C2_tfrrp

/* ==========================================================================
   Assembly Syntax:       Rd32=vitpack(Ps4,Pt4)
   C Intrinsic Prototype: Word32 Q6_R_vitpack_pp(Byte Ps, Byte Pt)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_vitpack_pp __builtin_HEXAGON_C2_vitpack

/* ==========================================================================
   Assembly Syntax:       Rdd32=vmux(Pu4,Rss32,Rtt32)
   C Intrinsic Prototype: Word64 Q6_P_vmux_pPP(Byte Pu, Word64 Rss, Word64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vmux_pPP __builtin_HEXAGON_C2_vmux

/* ==========================================================================
   Assembly Syntax:       Pd4=xor(Ps4,Pt4)
   C Intrinsic Prototype: Byte Q6_p_xor_pp(Byte Ps, Byte Pt)
   Instruction Type:      CR
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_xor_pp __builtin_HEXAGON_C2_xor

/* ==========================================================================
   Assembly Syntax:       Pd4=and(Ps4,and(Pt4,Pu4))
   C Intrinsic Prototype: Byte Q6_p_and_and_ppp(Byte Ps, Byte Pt, Byte Pu)
   Instruction Type:      CR
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_and_and_ppp __builtin_HEXAGON_C4_and_and

/* ==========================================================================
   Assembly Syntax:       Pd4=and(Ps4,and(Pt4,!Pu4))
   C Intrinsic Prototype: Byte Q6_p_and_and_ppnp(Byte Ps, Byte Pt, Byte Pu)
   Instruction Type:      CR
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_and_and_ppnp __builtin_HEXAGON_C4_and_andn

/* ==========================================================================
   Assembly Syntax:       Pd4=and(Ps4,or(Pt4,Pu4))
   C Intrinsic Prototype: Byte Q6_p_and_or_ppp(Byte Ps, Byte Pt, Byte Pu)
   Instruction Type:      CR
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_and_or_ppp __builtin_HEXAGON_C4_and_or

/* ==========================================================================
   Assembly Syntax:       Pd4=and(Ps4,or(Pt4,!Pu4))
   C Intrinsic Prototype: Byte Q6_p_and_or_ppnp(Byte Ps, Byte Pt, Byte Pu)
   Instruction Type:      CR
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_and_or_ppnp __builtin_HEXAGON_C4_and_orn

/* ==========================================================================
   Assembly Syntax:       Pd4=!cmp.gt(Rs32,Rt32)
   C Intrinsic Prototype: Byte Q6_p_not_cmp_gt_RR(Word32 Rs, Word32 Rt)
   Instruction Type:      ALU32_3op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_p_not_cmp_gt_RR __builtin_HEXAGON_C4_cmplte

/* ==========================================================================
   Assembly Syntax:       Pd4=!cmp.gt(Rs32,#s10)
   C Intrinsic Prototype: Byte Q6_p_not_cmp_gt_RI(Word32 Rs, Word32 Is10)
   Instruction Type:      ALU32_2op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_p_not_cmp_gt_RI __builtin_HEXAGON_C4_cmpltei

/* ==========================================================================
   Assembly Syntax:       Pd4=!cmp.gtu(Rs32,Rt32)
   C Intrinsic Prototype: Byte Q6_p_not_cmp_gtu_RR(Word32 Rs, Word32 Rt)
   Instruction Type:      ALU32_3op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_p_not_cmp_gtu_RR __builtin_HEXAGON_C4_cmplteu

/* ==========================================================================
   Assembly Syntax:       Pd4=!cmp.gtu(Rs32,#u9)
   C Intrinsic Prototype: Byte Q6_p_not_cmp_gtu_RI(Word32 Rs, Word32 Iu9)
   Instruction Type:      ALU32_2op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_p_not_cmp_gtu_RI __builtin_HEXAGON_C4_cmplteui

/* ==========================================================================
   Assembly Syntax:       Pd4=!cmp.eq(Rs32,Rt32)
   C Intrinsic Prototype: Byte Q6_p_not_cmp_eq_RR(Word32 Rs, Word32 Rt)
   Instruction Type:      ALU32_3op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_p_not_cmp_eq_RR __builtin_HEXAGON_C4_cmpneq

/* ==========================================================================
   Assembly Syntax:       Pd4=!cmp.eq(Rs32,#s10)
   C Intrinsic Prototype: Byte Q6_p_not_cmp_eq_RI(Word32 Rs, Word32 Is10)
   Instruction Type:      ALU32_2op
   Execution Slots:       SLOT0123
   ========================================================================== */

#define Q6_p_not_cmp_eq_RI __builtin_HEXAGON_C4_cmpneqi

/* ==========================================================================
   Assembly Syntax:       Pd4=fastcorner9(Ps4,Pt4)
   C Intrinsic Prototype: Byte Q6_p_fastcorner9_pp(Byte Ps, Byte Pt)
   Instruction Type:      CR
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_fastcorner9_pp __builtin_HEXAGON_C4_fastcorner9

/* ==========================================================================
   Assembly Syntax:       Pd4=!fastcorner9(Ps4,Pt4)
   C Intrinsic Prototype: Byte Q6_p_not_fastcorner9_pp(Byte Ps, Byte Pt)
   Instruction Type:      CR
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_not_fastcorner9_pp __builtin_HEXAGON_C4_fastcorner9_not

/* ==========================================================================
   Assembly Syntax:       Pd4=!bitsclr(Rs32,Rt32)
   C Intrinsic Prototype: Byte Q6_p_not_bitsclr_RR(Word32 Rs, Word32 Rt)
   Instruction Type:      S_3op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_not_bitsclr_RR __builtin_HEXAGON_C4_nbitsclr

/* ==========================================================================
   Assembly Syntax:       Pd4=!bitsclr(Rs32,#u6)
   C Intrinsic Prototype: Byte Q6_p_not_bitsclr_RI(Word32 Rs, Word32 Iu6)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_not_bitsclr_RI __builtin_HEXAGON_C4_nbitsclri

/* ==========================================================================
   Assembly Syntax:       Pd4=!bitsset(Rs32,Rt32)
   C Intrinsic Prototype: Byte Q6_p_not_bitsset_RR(Word32 Rs, Word32 Rt)
   Instruction Type:      S_3op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_not_bitsset_RR __builtin_HEXAGON_C4_nbitsset

/* ==========================================================================
   Assembly Syntax:       Pd4=or(Ps4,and(Pt4,Pu4))
   C Intrinsic Prototype: Byte Q6_p_or_and_ppp(Byte Ps, Byte Pt, Byte Pu)
   Instruction Type:      CR
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_or_and_ppp __builtin_HEXAGON_C4_or_and

/* ==========================================================================
   Assembly Syntax:       Pd4=or(Ps4,and(Pt4,!Pu4))
   C Intrinsic Prototype: Byte Q6_p_or_and_ppnp(Byte Ps, Byte Pt, Byte Pu)
   Instruction Type:      CR
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_or_and_ppnp __builtin_HEXAGON_C4_or_andn

/* ==========================================================================
   Assembly Syntax:       Pd4=or(Ps4,or(Pt4,Pu4))
   C Intrinsic Prototype: Byte Q6_p_or_or_ppp(Byte Ps, Byte Pt, Byte Pu)
   Instruction Type:      CR
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_or_or_ppp __builtin_HEXAGON_C4_or_or

/* ==========================================================================
   Assembly Syntax:       Pd4=or(Ps4,or(Pt4,!Pu4))
   C Intrinsic Prototype: Byte Q6_p_or_or_ppnp(Byte Ps, Byte Pt, Byte Pu)
   Instruction Type:      CR
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_or_or_ppnp __builtin_HEXAGON_C4_or_orn

/* ==========================================================================
   Assembly Syntax:       Rdd32=convert_d2df(Rss32)
   C Intrinsic Prototype: Float64 Q6_P_convert_d2df_P(Word64 Rss)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_convert_d2df_P __builtin_HEXAGON_F2_conv_d2df

/* ==========================================================================
   Assembly Syntax:       Rd32=convert_d2sf(Rss32)
   C Intrinsic Prototype: Float32 Q6_R_convert_d2sf_P(Word64 Rss)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_convert_d2sf_P __builtin_HEXAGON_F2_conv_d2sf

/* ==========================================================================
   Assembly Syntax:       Rdd32=convert_df2d(Rss32)
   C Intrinsic Prototype: Word64 Q6_P_convert_df2d_P(Float64 Rss)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_convert_df2d_P __builtin_HEXAGON_F2_conv_df2d

/* ==========================================================================
   Assembly Syntax:       Rdd32=convert_df2d(Rss32):chop
   C Intrinsic Prototype: Word64 Q6_P_convert_df2d_P_chop(Float64 Rss)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_convert_df2d_P_chop __builtin_HEXAGON_F2_conv_df2d_chop

/* ==========================================================================
   Assembly Syntax:       Rd32=convert_df2sf(Rss32)
   C Intrinsic Prototype: Float32 Q6_R_convert_df2sf_P(Float64 Rss)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_convert_df2sf_P __builtin_HEXAGON_F2_conv_df2sf

/* ==========================================================================
   Assembly Syntax:       Rdd32=convert_df2ud(Rss32)
   C Intrinsic Prototype: Word64 Q6_P_convert_df2ud_P(Float64 Rss)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_convert_df2ud_P __builtin_HEXAGON_F2_conv_df2ud

/* ==========================================================================
   Assembly Syntax:       Rdd32=convert_df2ud(Rss32):chop
   C Intrinsic Prototype: Word64 Q6_P_convert_df2ud_P_chop(Float64 Rss)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_convert_df2ud_P_chop __builtin_HEXAGON_F2_conv_df2ud_chop

/* ==========================================================================
   Assembly Syntax:       Rd32=convert_df2uw(Rss32)
   C Intrinsic Prototype: Word32 Q6_R_convert_df2uw_P(Float64 Rss)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_convert_df2uw_P __builtin_HEXAGON_F2_conv_df2uw

/* ==========================================================================
   Assembly Syntax:       Rd32=convert_df2uw(Rss32):chop
   C Intrinsic Prototype: Word32 Q6_R_convert_df2uw_P_chop(Float64 Rss)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_convert_df2uw_P_chop __builtin_HEXAGON_F2_conv_df2uw_chop

/* ==========================================================================
   Assembly Syntax:       Rd32=convert_df2w(Rss32)
   C Intrinsic Prototype: Word32 Q6_R_convert_df2w_P(Float64 Rss)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_convert_df2w_P __builtin_HEXAGON_F2_conv_df2w

/* ==========================================================================
   Assembly Syntax:       Rd32=convert_df2w(Rss32):chop
   C Intrinsic Prototype: Word32 Q6_R_convert_df2w_P_chop(Float64 Rss)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_convert_df2w_P_chop __builtin_HEXAGON_F2_conv_df2w_chop

/* ==========================================================================
   Assembly Syntax:       Rdd32=convert_sf2d(Rs32)
   C Intrinsic Prototype: Word64 Q6_P_convert_sf2d_R(Float32 Rs)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_convert_sf2d_R __builtin_HEXAGON_F2_conv_sf2d

/* ==========================================================================
   Assembly Syntax:       Rdd32=convert_sf2d(Rs32):chop
   C Intrinsic Prototype: Word64 Q6_P_convert_sf2d_R_chop(Float32 Rs)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_convert_sf2d_R_chop __builtin_HEXAGON_F2_conv_sf2d_chop

/* ==========================================================================
   Assembly Syntax:       Rdd32=convert_sf2df(Rs32)
   C Intrinsic Prototype: Float64 Q6_P_convert_sf2df_R(Float32 Rs)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_convert_sf2df_R __builtin_HEXAGON_F2_conv_sf2df

/* ==========================================================================
   Assembly Syntax:       Rdd32=convert_sf2ud(Rs32)
   C Intrinsic Prototype: Word64 Q6_P_convert_sf2ud_R(Float32 Rs)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_convert_sf2ud_R __builtin_HEXAGON_F2_conv_sf2ud

/* ==========================================================================
   Assembly Syntax:       Rdd32=convert_sf2ud(Rs32):chop
   C Intrinsic Prototype: Word64 Q6_P_convert_sf2ud_R_chop(Float32 Rs)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_convert_sf2ud_R_chop __builtin_HEXAGON_F2_conv_sf2ud_chop

/* ==========================================================================
   Assembly Syntax:       Rd32=convert_sf2uw(Rs32)
   C Intrinsic Prototype: Word32 Q6_R_convert_sf2uw_R(Float32 Rs)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_convert_sf2uw_R __builtin_HEXAGON_F2_conv_sf2uw

/* ==========================================================================
   Assembly Syntax:       Rd32=convert_sf2uw(Rs32):chop
   C Intrinsic Prototype: Word32 Q6_R_convert_sf2uw_R_chop(Float32 Rs)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_convert_sf2uw_R_chop __builtin_HEXAGON_F2_conv_sf2uw_chop

/* ==========================================================================
   Assembly Syntax:       Rd32=convert_sf2w(Rs32)
   C Intrinsic Prototype: Word32 Q6_R_convert_sf2w_R(Float32 Rs)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_convert_sf2w_R __builtin_HEXAGON_F2_conv_sf2w

/* ==========================================================================
   Assembly Syntax:       Rd32=convert_sf2w(Rs32):chop
   C Intrinsic Prototype: Word32 Q6_R_convert_sf2w_R_chop(Float32 Rs)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_convert_sf2w_R_chop __builtin_HEXAGON_F2_conv_sf2w_chop

/* ==========================================================================
   Assembly Syntax:       Rdd32=convert_ud2df(Rss32)
   C Intrinsic Prototype: Float64 Q6_P_convert_ud2df_P(Word64 Rss)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_convert_ud2df_P __builtin_HEXAGON_F2_conv_ud2df

/* ==========================================================================
   Assembly Syntax:       Rd32=convert_ud2sf(Rss32)
   C Intrinsic Prototype: Float32 Q6_R_convert_ud2sf_P(Word64 Rss)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_convert_ud2sf_P __builtin_HEXAGON_F2_conv_ud2sf

/* ==========================================================================
   Assembly Syntax:       Rdd32=convert_uw2df(Rs32)
   C Intrinsic Prototype: Float64 Q6_P_convert_uw2df_R(Word32 Rs)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_convert_uw2df_R __builtin_HEXAGON_F2_conv_uw2df

/* ==========================================================================
   Assembly Syntax:       Rd32=convert_uw2sf(Rs32)
   C Intrinsic Prototype: Float32 Q6_R_convert_uw2sf_R(Word32 Rs)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_convert_uw2sf_R __builtin_HEXAGON_F2_conv_uw2sf

/* ==========================================================================
   Assembly Syntax:       Rdd32=convert_w2df(Rs32)
   C Intrinsic Prototype: Float64 Q6_P_convert_w2df_R(Word32 Rs)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_convert_w2df_R __builtin_HEXAGON_F2_conv_w2df

/* ==========================================================================
   Assembly Syntax:       Rd32=convert_w2sf(Rs32)
   C Intrinsic Prototype: Float32 Q6_R_convert_w2sf_R(Word32 Rs)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_convert_w2sf_R __builtin_HEXAGON_F2_conv_w2sf

/* ==========================================================================
   Assembly Syntax:       Pd4=dfclass(Rss32,#u5)
   C Intrinsic Prototype: Byte Q6_p_dfclass_PI(Float64 Rss, Word32 Iu5)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_dfclass_PI __builtin_HEXAGON_F2_dfclass

/* ==========================================================================
   Assembly Syntax:       Pd4=dfcmp.eq(Rss32,Rtt32)
   C Intrinsic Prototype: Byte Q6_p_dfcmp_eq_PP(Float64 Rss, Float64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_dfcmp_eq_PP __builtin_HEXAGON_F2_dfcmpeq

/* ==========================================================================
   Assembly Syntax:       Pd4=dfcmp.ge(Rss32,Rtt32)
   C Intrinsic Prototype: Byte Q6_p_dfcmp_ge_PP(Float64 Rss, Float64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_dfcmp_ge_PP __builtin_HEXAGON_F2_dfcmpge

/* ==========================================================================
   Assembly Syntax:       Pd4=dfcmp.gt(Rss32,Rtt32)
   C Intrinsic Prototype: Byte Q6_p_dfcmp_gt_PP(Float64 Rss, Float64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_dfcmp_gt_PP __builtin_HEXAGON_F2_dfcmpgt

/* ==========================================================================
   Assembly Syntax:       Pd4=dfcmp.uo(Rss32,Rtt32)
   C Intrinsic Prototype: Byte Q6_p_dfcmp_uo_PP(Float64 Rss, Float64 Rtt)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_dfcmp_uo_PP __builtin_HEXAGON_F2_dfcmpuo

/* ==========================================================================
   Assembly Syntax:       Rdd32=dfmake(#u10):neg
   C Intrinsic Prototype: Float64 Q6_P_dfmake_I_neg(Word32 Iu10)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_dfmake_I_neg __builtin_HEXAGON_F2_dfimm_n

/* ==========================================================================
   Assembly Syntax:       Rdd32=dfmake(#u10):pos
   C Intrinsic Prototype: Float64 Q6_P_dfmake_I_pos(Word32 Iu10)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_dfmake_I_pos __builtin_HEXAGON_F2_dfimm_p

/* ==========================================================================
   Assembly Syntax:       Rd32=sfadd(Rs32,Rt32)
   C Intrinsic Prototype: Float32 Q6_R_sfadd_RR(Float32 Rs, Float32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_sfadd_RR __builtin_HEXAGON_F2_sfadd

/* ==========================================================================
   Assembly Syntax:       Pd4=sfclass(Rs32,#u5)
   C Intrinsic Prototype: Byte Q6_p_sfclass_RI(Float32 Rs, Word32 Iu5)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_sfclass_RI __builtin_HEXAGON_F2_sfclass

/* ==========================================================================
   Assembly Syntax:       Pd4=sfcmp.eq(Rs32,Rt32)
   C Intrinsic Prototype: Byte Q6_p_sfcmp_eq_RR(Float32 Rs, Float32 Rt)
   Instruction Type:      S_3op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_sfcmp_eq_RR __builtin_HEXAGON_F2_sfcmpeq

/* ==========================================================================
   Assembly Syntax:       Pd4=sfcmp.ge(Rs32,Rt32)
   C Intrinsic Prototype: Byte Q6_p_sfcmp_ge_RR(Float32 Rs, Float32 Rt)
   Instruction Type:      S_3op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_sfcmp_ge_RR __builtin_HEXAGON_F2_sfcmpge

/* ==========================================================================
   Assembly Syntax:       Pd4=sfcmp.gt(Rs32,Rt32)
   C Intrinsic Prototype: Byte Q6_p_sfcmp_gt_RR(Float32 Rs, Float32 Rt)
   Instruction Type:      S_3op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_sfcmp_gt_RR __builtin_HEXAGON_F2_sfcmpgt

/* ==========================================================================
   Assembly Syntax:       Pd4=sfcmp.uo(Rs32,Rt32)
   C Intrinsic Prototype: Byte Q6_p_sfcmp_uo_RR(Float32 Rs, Float32 Rt)
   Instruction Type:      S_3op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_p_sfcmp_uo_RR __builtin_HEXAGON_F2_sfcmpuo

/* ==========================================================================
   Assembly Syntax:       Rd32=sffixupd(Rs32,Rt32)
   C Intrinsic Prototype: Float32 Q6_R_sffixupd_RR(Float32 Rs, Float32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_sffixupd_RR __builtin_HEXAGON_F2_sffixupd

/* ==========================================================================
   Assembly Syntax:       Rd32=sffixupn(Rs32,Rt32)
   C Intrinsic Prototype: Float32 Q6_R_sffixupn_RR(Float32 Rs, Float32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_sffixupn_RR __builtin_HEXAGON_F2_sffixupn

/* ==========================================================================
   Assembly Syntax:       Rd32=sffixupr(Rs32)
   C Intrinsic Prototype: Float32 Q6_R_sffixupr_R(Float32 Rs)
   Instruction Type:      S_2op
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_sffixupr_R __builtin_HEXAGON_F2_sffixupr

/* ==========================================================================
   Assembly Syntax:       Rx32+=sfmpy(Rs32,Rt32)
   C Intrinsic Prototype: Float32 Q6_R_sfmpyacc_RR(Float32 Rx, Float32 Rs, Float32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_sfmpyacc_RR __builtin_HEXAGON_F2_sffma

/* ==========================================================================
   Assembly Syntax:       Rx32+=sfmpy(Rs32,Rt32):lib
   C Intrinsic Prototype: Float32 Q6_R_sfmpyacc_RR_lib(Float32 Rx, Float32 Rs, Float32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_sfmpyacc_RR_lib __builtin_HEXAGON_F2_sffma_lib

/* ==========================================================================
   Assembly Syntax:       Rx32+=sfmpy(Rs32,Rt32,Pu4):scale
   C Intrinsic Prototype: Float32 Q6_R_sfmpyacc_RRp_scale(Float32 Rx, Float32 Rs, Float32 Rt, Byte Pu)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_sfmpyacc_RRp_scale __builtin_HEXAGON_F2_sffma_sc

/* ==========================================================================
   Assembly Syntax:       Rx32-=sfmpy(Rs32,Rt32)
   C Intrinsic Prototype: Float32 Q6_R_sfmpynac_RR(Float32 Rx, Float32 Rs, Float32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_sfmpynac_RR __builtin_HEXAGON_F2_sffms

/* ==========================================================================
   Assembly Syntax:       Rx32-=sfmpy(Rs32,Rt32):lib
   C Intrinsic Prototype: Float32 Q6_R_sfmpynac_RR_lib(Float32 Rx, Float32 Rs, Float32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_sfmpynac_RR_lib __builtin_HEXAGON_F2_sffms_lib

/* ==========================================================================
   Assembly Syntax:       Rd32=sfmake(#u10):neg
   C Intrinsic Prototype: Float32 Q6_R_sfmake_I_neg(Word32 Iu10)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_sfmake_I_neg __builtin_HEXAGON_F2_sfimm_n

/* ==========================================================================
   Assembly Syntax:       Rd32=sfmake(#u10):pos
   C Intrinsic Prototype: Float32 Q6_R_sfmake_I_pos(Word32 Iu10)
   Instruction Type:      ALU64
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_sfmake_I_pos __builtin_HEXAGON_F2_sfimm_p

/* ==========================================================================
   Assembly Syntax:       Rd32=sfmax(Rs32,Rt32)
   C Intrinsic Prototype: Float32 Q6_R_sfmax_RR(Float32 Rs, Float32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_sfmax_RR __builtin_HEXAGON_F2_sfmax

/* ==========================================================================
   Assembly Syntax:       Rd32=sfmin(Rs32,Rt32)
   C Intrinsic Prototype: Float32 Q6_R_sfmin_RR(Float32 Rs, Float32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_sfmin_RR __builtin_HEXAGON_F2_sfmin

/* ==========================================================================
   Assembly Syntax:       Rd32=sfmpy(Rs32,Rt32)
   C Intrinsic Prototype: Float32 Q6_R_sfmpy_RR(Float32 Rs, Float32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_sfmpy_RR __builtin_HEXAGON_F2_sfmpy

/* ==========================================================================
   Assembly Syntax:       Rd32=sfsub(Rs32,Rt32)
   C Intrinsic Prototype: Float32 Q6_R_sfsub_RR(Float32 Rs, Float32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_sfsub_RR __builtin_HEXAGON_F2_sfsub

/* ==========================================================================
   Assembly Syntax:       Rd32=memb(Rx32++#s4:0:circ(Mu2))
   C Intrinsic Prototype: Word32 Q6_R_memb_IM_circ(void** Rx, Word32 Is4_0, Word32 Mu, void* BaseAddress)
   Instruction Type:      LD
   Execution Slots:       SLOT01
   ========================================================================== */

#define Q6_R_memb_IM_circ __builtin_HEXAGON_L2_loadrb_pci

/* ==========================================================================
   Assembly Syntax:       Rd32=memb(Rx32++I:circ(Mu2))
   C Intrinsic Prototype: Word32 Q6_R_memb_M_circ(void** Rx, Word32 Mu, void* BaseAddress)
   Instruction Type:      LD
   Execution Slots:       SLOT01
   ========================================================================== */

#define Q6_R_memb_M_circ __builtin_HEXAGON_L2_loadrb_pcr

/* ==========================================================================
   Assembly Syntax:       Rdd32=memd(Rx32++#s4:3:circ(Mu2))
   C Intrinsic Prototype: Word64 Q6_P_memd_IM_circ(void** Rx, Word32 Is4_3, Word32 Mu, void* BaseAddress)
   Instruction Type:      LD
   Execution Slots:       SLOT01
   ========================================================================== */

#define Q6_P_memd_IM_circ __builtin_HEXAGON_L2_loadrd_pci

/* ==========================================================================
   Assembly Syntax:       Rdd32=memd(Rx32++I:circ(Mu2))
   C Intrinsic Prototype: Word64 Q6_P_memd_M_circ(void** Rx, Word32 Mu, void* BaseAddress)
   Instruction Type:      LD
   Execution Slots:       SLOT01
   ========================================================================== */

#define Q6_P_memd_M_circ __builtin_HEXAGON_L2_loadrd_pcr

/* ==========================================================================
   Assembly Syntax:       Rd32=memh(Rx32++#s4:1:circ(Mu2))
   C Intrinsic Prototype: Word32 Q6_R_memh_IM_circ(void** Rx, Word32 Is4_1, Word32 Mu, void* BaseAddress)
   Instruction Type:      LD
   Execution Slots:       SLOT01
   ========================================================================== */

#define Q6_R_memh_IM_circ __builtin_HEXAGON_L2_loadrh_pci

/* ==========================================================================
   Assembly Syntax:       Rd32=memh(Rx32++I:circ(Mu2))
   C Intrinsic Prototype: Word32 Q6_R_memh_M_circ(void** Rx, Word32 Mu, void* BaseAddress)
   Instruction Type:      LD
   Execution Slots:       SLOT01
   ========================================================================== */

#define Q6_R_memh_M_circ __builtin_HEXAGON_L2_loadrh_pcr

/* ==========================================================================
   Assembly Syntax:       Rd32=memw(Rx32++#s4:2:circ(Mu2))
   C Intrinsic Prototype: Word32 Q6_R_memw_IM_circ(void** Rx, Word32 Is4_2, Word32 Mu, void* BaseAddress)
   Instruction Type:      LD
   Execution Slots:       SLOT01
   ========================================================================== */

#define Q6_R_memw_IM_circ __builtin_HEXAGON_L2_loadri_pci

/* ==========================================================================
   Assembly Syntax:       Rd32=memw(Rx32++I:circ(Mu2))
   C Intrinsic Prototype: Word32 Q6_R_memw_M_circ(void** Rx, Word32 Mu, void* BaseAddress)
   Instruction Type:      LD
   Execution Slots:       SLOT01
   ========================================================================== */

#define Q6_R_memw_M_circ __builtin_HEXAGON_L2_loadri_pcr

/* ==========================================================================
   Assembly Syntax:       Rd32=memub(Rx32++#s4:0:circ(Mu2))
   C Intrinsic Prototype: Word32 Q6_R_memub_IM_circ(void** Rx, Word32 Is4_0, Word32 Mu, void* BaseAddress)
   Instruction Type:      LD
   Execution Slots:       SLOT01
   ========================================================================== */

#define Q6_R_memub_IM_circ __builtin_HEXAGON_L2_loadrub_pci

/* ==========================================================================
   Assembly Syntax:       Rd32=memub(Rx32++I:circ(Mu2))
   C Intrinsic Prototype: Word32 Q6_R_memub_M_circ(void** Rx, Word32 Mu, void* BaseAddress)
   Instruction Type:      LD
   Execution Slots:       SLOT01
   ========================================================================== */

#define Q6_R_memub_M_circ __builtin_HEXAGON_L2_loadrub_pcr

/* ==========================================================================
   Assembly Syntax:       Rd32=memuh(Rx32++#s4:1:circ(Mu2))
   C Intrinsic Prototype: Word32 Q6_R_memuh_IM_circ(void** Rx, Word32 Is4_1, Word32 Mu, void* BaseAddress)
   Instruction Type:      LD
   Execution Slots:       SLOT01
   ========================================================================== */

#define Q6_R_memuh_IM_circ __builtin_HEXAGON_L2_loadruh_pci

/* ==========================================================================
   Assembly Syntax:       Rd32=memuh(Rx32++I:circ(Mu2))
   C Intrinsic Prototype: Word32 Q6_R_memuh_M_circ(void** Rx, Word32 Mu, void* BaseAddress)
   Instruction Type:      LD
   Execution Slots:       SLOT01
   ========================================================================== */

#define Q6_R_memuh_M_circ __builtin_HEXAGON_L2_loadruh_pcr

/* ==========================================================================
   Assembly Syntax:       Rx32+=add(Rs32,Rt32)
   C Intrinsic Prototype: Word32 Q6_R_addacc_RR(Word32 Rx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_addacc_RR __builtin_HEXAGON_M2_acci

/* ==========================================================================
   Assembly Syntax:       Rx32+=add(Rs32,#s8)
   C Intrinsic Prototype: Word32 Q6_R_addacc_RI(Word32 Rx, Word32 Rs, Word32 Is8)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_addacc_RI __builtin_HEXAGON_M2_accii

/* ==========================================================================
   Assembly Syntax:       Rxx32+=cmpyi(Rs32,Rt32)
   C Intrinsic Prototype: Word64 Q6_P_cmpyiacc_RR(Word64 Rxx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_cmpyiacc_RR __builtin_HEXAGON_M2_cmaci_s0

/* ==========================================================================
   Assembly Syntax:       Rxx32+=cmpyr(Rs32,Rt32)
   C Intrinsic Prototype: Word64 Q6_P_cmpyracc_RR(Word64 Rxx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_cmpyracc_RR __builtin_HEXAGON_M2_cmacr_s0

/* ==========================================================================
   Assembly Syntax:       Rxx32+=cmpy(Rs32,Rt32):sat
   C Intrinsic Prototype: Word64 Q6_P_cmpyacc_RR_sat(Word64 Rxx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_cmpyacc_RR_sat __builtin_HEXAGON_M2_cmacs_s0

/* ==========================================================================
   Assembly Syntax:       Rxx32+=cmpy(Rs32,Rt32):<<1:sat
   C Intrinsic Prototype: Word64 Q6_P_cmpyacc_RR_s1_sat(Word64 Rxx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_cmpyacc_RR_s1_sat __builtin_HEXAGON_M2_cmacs_s1

/* ==========================================================================
   Assembly Syntax:       Rxx32+=cmpy(Rs32,Rt32*):sat
   C Intrinsic Prototype: Word64 Q6_P_cmpyacc_RR_conj_sat(Word64 Rxx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_cmpyacc_RR_conj_sat __builtin_HEXAGON_M2_cmacsc_s0

/* ==========================================================================
   Assembly Syntax:       Rxx32+=cmpy(Rs32,Rt32*):<<1:sat
   C Intrinsic Prototype: Word64 Q6_P_cmpyacc_RR_conj_s1_sat(Word64 Rxx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_cmpyacc_RR_conj_s1_sat __builtin_HEXAGON_M2_cmacsc_s1

/* ==========================================================================
   Assembly Syntax:       Rdd32=cmpyi(Rs32,Rt32)
   C Intrinsic Prototype: Word64 Q6_P_cmpyi_RR(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_cmpyi_RR __builtin_HEXAGON_M2_cmpyi_s0

/* ==========================================================================
   Assembly Syntax:       Rdd32=cmpyr(Rs32,Rt32)
   C Intrinsic Prototype: Word64 Q6_P_cmpyr_RR(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_cmpyr_RR __builtin_HEXAGON_M2_cmpyr_s0

/* ==========================================================================
   Assembly Syntax:       Rd32=cmpy(Rs32,Rt32):rnd:sat
   C Intrinsic Prototype: Word32 Q6_R_cmpy_RR_rnd_sat(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_cmpy_RR_rnd_sat __builtin_HEXAGON_M2_cmpyrs_s0

/* ==========================================================================
   Assembly Syntax:       Rd32=cmpy(Rs32,Rt32):<<1:rnd:sat
   C Intrinsic Prototype: Word32 Q6_R_cmpy_RR_s1_rnd_sat(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_cmpy_RR_s1_rnd_sat __builtin_HEXAGON_M2_cmpyrs_s1

/* ==========================================================================
   Assembly Syntax:       Rd32=cmpy(Rs32,Rt32*):rnd:sat
   C Intrinsic Prototype: Word32 Q6_R_cmpy_RR_conj_rnd_sat(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_cmpy_RR_conj_rnd_sat __builtin_HEXAGON_M2_cmpyrsc_s0

/* ==========================================================================
   Assembly Syntax:       Rd32=cmpy(Rs32,Rt32*):<<1:rnd:sat
   C Intrinsic Prototype: Word32 Q6_R_cmpy_RR_conj_s1_rnd_sat(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_cmpy_RR_conj_s1_rnd_sat __builtin_HEXAGON_M2_cmpyrsc_s1

/* ==========================================================================
   Assembly Syntax:       Rdd32=cmpy(Rs32,Rt32):sat
   C Intrinsic Prototype: Word64 Q6_P_cmpy_RR_sat(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_cmpy_RR_sat __builtin_HEXAGON_M2_cmpys_s0

/* ==========================================================================
   Assembly Syntax:       Rdd32=cmpy(Rs32,Rt32):<<1:sat
   C Intrinsic Prototype: Word64 Q6_P_cmpy_RR_s1_sat(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_cmpy_RR_s1_sat __builtin_HEXAGON_M2_cmpys_s1

/* ==========================================================================
   Assembly Syntax:       Rdd32=cmpy(Rs32,Rt32*):sat
   C Intrinsic Prototype: Word64 Q6_P_cmpy_RR_conj_sat(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_cmpy_RR_conj_sat __builtin_HEXAGON_M2_cmpysc_s0

/* ==========================================================================
   Assembly Syntax:       Rdd32=cmpy(Rs32,Rt32*):<<1:sat
   C Intrinsic Prototype: Word64 Q6_P_cmpy_RR_conj_s1_sat(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_cmpy_RR_conj_s1_sat __builtin_HEXAGON_M2_cmpysc_s1

/* ==========================================================================
   Assembly Syntax:       Rxx32-=cmpy(Rs32,Rt32):sat
   C Intrinsic Prototype: Word64 Q6_P_cmpynac_RR_sat(Word64 Rxx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_cmpynac_RR_sat __builtin_HEXAGON_M2_cnacs_s0

/* ==========================================================================
   Assembly Syntax:       Rxx32-=cmpy(Rs32,Rt32):<<1:sat
   C Intrinsic Prototype: Word64 Q6_P_cmpynac_RR_s1_sat(Word64 Rxx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_cmpynac_RR_s1_sat __builtin_HEXAGON_M2_cnacs_s1

/* ==========================================================================
   Assembly Syntax:       Rxx32-=cmpy(Rs32,Rt32*):sat
   C Intrinsic Prototype: Word64 Q6_P_cmpynac_RR_conj_sat(Word64 Rxx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_cmpynac_RR_conj_sat __builtin_HEXAGON_M2_cnacsc_s0

/* ==========================================================================
   Assembly Syntax:       Rxx32-=cmpy(Rs32,Rt32*):<<1:sat
   C Intrinsic Prototype: Word64 Q6_P_cmpynac_RR_conj_s1_sat(Word64 Rxx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_cmpynac_RR_conj_s1_sat __builtin_HEXAGON_M2_cnacsc_s1

/* ==========================================================================
   Assembly Syntax:       Rxx32+=mpy(Rs32,Rt32)
   C Intrinsic Prototype: Word64 Q6_P_mpyacc_RR(Word64 Rxx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_mpyacc_RR __builtin_HEXAGON_M2_dpmpyss_acc_s0

/* ==========================================================================
   Assembly Syntax:       Rxx32-=mpy(Rs32,Rt32)
   C Intrinsic Prototype: Word64 Q6_P_mpynac_RR(Word64 Rxx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_mpynac_RR __builtin_HEXAGON_M2_dpmpyss_nac_s0

/* ==========================================================================
   Assembly Syntax:       Rd32=mpy(Rs32,Rt32):rnd
   C Intrinsic Prototype: Word32 Q6_R_mpy_RR_rnd(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpy_RR_rnd __builtin_HEXAGON_M2_dpmpyss_rnd_s0

/* ==========================================================================
   Assembly Syntax:       Rdd32=mpy(Rs32,Rt32)
   C Intrinsic Prototype: Word64 Q6_P_mpy_RR(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_mpy_RR __builtin_HEXAGON_M2_dpmpyss_s0

/* ==========================================================================
   Assembly Syntax:       Rxx32+=mpyu(Rs32,Rt32)
   C Intrinsic Prototype: Word64 Q6_P_mpyuacc_RR(Word64 Rxx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_mpyuacc_RR __builtin_HEXAGON_M2_dpmpyuu_acc_s0

/* ==========================================================================
   Assembly Syntax:       Rxx32-=mpyu(Rs32,Rt32)
   C Intrinsic Prototype: Word64 Q6_P_mpyunac_RR(Word64 Rxx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_mpyunac_RR __builtin_HEXAGON_M2_dpmpyuu_nac_s0

/* ==========================================================================
   Assembly Syntax:       Rdd32=mpyu(Rs32,Rt32)
   C Intrinsic Prototype: UWord64 Q6_P_mpyu_RR(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_mpyu_RR __builtin_HEXAGON_M2_dpmpyuu_s0

/* ==========================================================================
   Assembly Syntax:       Rd32=mpy(Rs32,Rt32.h):<<1:rnd:sat
   C Intrinsic Prototype: Word32 Q6_R_mpy_RRh_s1_rnd_sat(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpy_RRh_s1_rnd_sat __builtin_HEXAGON_M2_hmmpyh_rs1

/* ==========================================================================
   Assembly Syntax:       Rd32=mpy(Rs32,Rt32.h):<<1:sat
   C Intrinsic Prototype: Word32 Q6_R_mpy_RRh_s1_sat(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpy_RRh_s1_sat __builtin_HEXAGON_M2_hmmpyh_s1

/* ==========================================================================
   Assembly Syntax:       Rd32=mpy(Rs32,Rt32.l):<<1:rnd:sat
   C Intrinsic Prototype: Word32 Q6_R_mpy_RRl_s1_rnd_sat(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpy_RRl_s1_rnd_sat __builtin_HEXAGON_M2_hmmpyl_rs1

/* ==========================================================================
   Assembly Syntax:       Rd32=mpy(Rs32,Rt32.l):<<1:sat
   C Intrinsic Prototype: Word32 Q6_R_mpy_RRl_s1_sat(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpy_RRl_s1_sat __builtin_HEXAGON_M2_hmmpyl_s1

/* ==========================================================================
   Assembly Syntax:       Rx32+=mpyi(Rs32,Rt32)
   C Intrinsic Prototype: Word32 Q6_R_mpyiacc_RR(Word32 Rx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpyiacc_RR __builtin_HEXAGON_M2_maci

/* ==========================================================================
   Assembly Syntax:       Rx32-=mpyi(Rs32,#u8)
   C Intrinsic Prototype: Word32 Q6_R_mpyinac_RI(Word32 Rx, Word32 Rs, Word32 Iu8)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpyinac_RI __builtin_HEXAGON_M2_macsin

/* ==========================================================================
   Assembly Syntax:       Rx32+=mpyi(Rs32,#u8)
   C Intrinsic Prototype: Word32 Q6_R_mpyiacc_RI(Word32 Rx, Word32 Rs, Word32 Iu8)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpyiacc_RI __builtin_HEXAGON_M2_macsip

/* ==========================================================================
   Assembly Syntax:       Rxx32+=vmpywoh(Rss32,Rtt32):rnd:sat
   C Intrinsic Prototype: Word64 Q6_P_vmpywohacc_PP_rnd_sat(Word64 Rxx, Word64 Rss, Word64 Rtt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vmpywohacc_PP_rnd_sat __builtin_HEXAGON_M2_mmachs_rs0

/* ==========================================================================
   Assembly Syntax:       Rxx32+=vmpywoh(Rss32,Rtt32):<<1:rnd:sat
   C Intrinsic Prototype: Word64 Q6_P_vmpywohacc_PP_s1_rnd_sat(Word64 Rxx, Word64 Rss, Word64 Rtt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vmpywohacc_PP_s1_rnd_sat __builtin_HEXAGON_M2_mmachs_rs1

/* ==========================================================================
   Assembly Syntax:       Rxx32+=vmpywoh(Rss32,Rtt32):sat
   C Intrinsic Prototype: Word64 Q6_P_vmpywohacc_PP_sat(Word64 Rxx, Word64 Rss, Word64 Rtt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vmpywohacc_PP_sat __builtin_HEXAGON_M2_mmachs_s0

/* ==========================================================================
   Assembly Syntax:       Rxx32+=vmpywoh(Rss32,Rtt32):<<1:sat
   C Intrinsic Prototype: Word64 Q6_P_vmpywohacc_PP_s1_sat(Word64 Rxx, Word64 Rss, Word64 Rtt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vmpywohacc_PP_s1_sat __builtin_HEXAGON_M2_mmachs_s1

/* ==========================================================================
   Assembly Syntax:       Rxx32+=vmpyweh(Rss32,Rtt32):rnd:sat
   C Intrinsic Prototype: Word64 Q6_P_vmpywehacc_PP_rnd_sat(Word64 Rxx, Word64 Rss, Word64 Rtt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vmpywehacc_PP_rnd_sat __builtin_HEXAGON_M2_mmacls_rs0

/* ==========================================================================
   Assembly Syntax:       Rxx32+=vmpyweh(Rss32,Rtt32):<<1:rnd:sat
   C Intrinsic Prototype: Word64 Q6_P_vmpywehacc_PP_s1_rnd_sat(Word64 Rxx, Word64 Rss, Word64 Rtt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vmpywehacc_PP_s1_rnd_sat __builtin_HEXAGON_M2_mmacls_rs1

/* ==========================================================================
   Assembly Syntax:       Rxx32+=vmpyweh(Rss32,Rtt32):sat
   C Intrinsic Prototype: Word64 Q6_P_vmpywehacc_PP_sat(Word64 Rxx, Word64 Rss, Word64 Rtt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vmpywehacc_PP_sat __builtin_HEXAGON_M2_mmacls_s0

/* ==========================================================================
   Assembly Syntax:       Rxx32+=vmpyweh(Rss32,Rtt32):<<1:sat
   C Intrinsic Prototype: Word64 Q6_P_vmpywehacc_PP_s1_sat(Word64 Rxx, Word64 Rss, Word64 Rtt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vmpywehacc_PP_s1_sat __builtin_HEXAGON_M2_mmacls_s1

/* ==========================================================================
   Assembly Syntax:       Rxx32+=vmpywouh(Rss32,Rtt32):rnd:sat
   C Intrinsic Prototype: Word64 Q6_P_vmpywouhacc_PP_rnd_sat(Word64 Rxx, Word64 Rss, Word64 Rtt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vmpywouhacc_PP_rnd_sat __builtin_HEXAGON_M2_mmacuhs_rs0

/* ==========================================================================
   Assembly Syntax:       Rxx32+=vmpywouh(Rss32,Rtt32):<<1:rnd:sat
   C Intrinsic Prototype: Word64 Q6_P_vmpywouhacc_PP_s1_rnd_sat(Word64 Rxx, Word64 Rss, Word64 Rtt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vmpywouhacc_PP_s1_rnd_sat __builtin_HEXAGON_M2_mmacuhs_rs1

/* ==========================================================================
   Assembly Syntax:       Rxx32+=vmpywouh(Rss32,Rtt32):sat
   C Intrinsic Prototype: Word64 Q6_P_vmpywouhacc_PP_sat(Word64 Rxx, Word64 Rss, Word64 Rtt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vmpywouhacc_PP_sat __builtin_HEXAGON_M2_mmacuhs_s0

/* ==========================================================================
   Assembly Syntax:       Rxx32+=vmpywouh(Rss32,Rtt32):<<1:sat
   C Intrinsic Prototype: Word64 Q6_P_vmpywouhacc_PP_s1_sat(Word64 Rxx, Word64 Rss, Word64 Rtt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vmpywouhacc_PP_s1_sat __builtin_HEXAGON_M2_mmacuhs_s1

/* ==========================================================================
   Assembly Syntax:       Rxx32+=vmpyweuh(Rss32,Rtt32):rnd:sat
   C Intrinsic Prototype: Word64 Q6_P_vmpyweuhacc_PP_rnd_sat(Word64 Rxx, Word64 Rss, Word64 Rtt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vmpyweuhacc_PP_rnd_sat __builtin_HEXAGON_M2_mmaculs_rs0

/* ==========================================================================
   Assembly Syntax:       Rxx32+=vmpyweuh(Rss32,Rtt32):<<1:rnd:sat
   C Intrinsic Prototype: Word64 Q6_P_vmpyweuhacc_PP_s1_rnd_sat(Word64 Rxx, Word64 Rss, Word64 Rtt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vmpyweuhacc_PP_s1_rnd_sat __builtin_HEXAGON_M2_mmaculs_rs1

/* ==========================================================================
   Assembly Syntax:       Rxx32+=vmpyweuh(Rss32,Rtt32):sat
   C Intrinsic Prototype: Word64 Q6_P_vmpyweuhacc_PP_sat(Word64 Rxx, Word64 Rss, Word64 Rtt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vmpyweuhacc_PP_sat __builtin_HEXAGON_M2_mmaculs_s0

/* ==========================================================================
   Assembly Syntax:       Rxx32+=vmpyweuh(Rss32,Rtt32):<<1:sat
   C Intrinsic Prototype: Word64 Q6_P_vmpyweuhacc_PP_s1_sat(Word64 Rxx, Word64 Rss, Word64 Rtt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vmpyweuhacc_PP_s1_sat __builtin_HEXAGON_M2_mmaculs_s1

/* ==========================================================================
   Assembly Syntax:       Rdd32=vmpywoh(Rss32,Rtt32):rnd:sat
   C Intrinsic Prototype: Word64 Q6_P_vmpywoh_PP_rnd_sat(Word64 Rss, Word64 Rtt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vmpywoh_PP_rnd_sat __builtin_HEXAGON_M2_mmpyh_rs0

/* ==========================================================================
   Assembly Syntax:       Rdd32=vmpywoh(Rss32,Rtt32):<<1:rnd:sat
   C Intrinsic Prototype: Word64 Q6_P_vmpywoh_PP_s1_rnd_sat(Word64 Rss, Word64 Rtt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vmpywoh_PP_s1_rnd_sat __builtin_HEXAGON_M2_mmpyh_rs1

/* ==========================================================================
   Assembly Syntax:       Rdd32=vmpywoh(Rss32,Rtt32):sat
   C Intrinsic Prototype: Word64 Q6_P_vmpywoh_PP_sat(Word64 Rss, Word64 Rtt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vmpywoh_PP_sat __builtin_HEXAGON_M2_mmpyh_s0

/* ==========================================================================
   Assembly Syntax:       Rdd32=vmpywoh(Rss32,Rtt32):<<1:sat
   C Intrinsic Prototype: Word64 Q6_P_vmpywoh_PP_s1_sat(Word64 Rss, Word64 Rtt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vmpywoh_PP_s1_sat __builtin_HEXAGON_M2_mmpyh_s1

/* ==========================================================================
   Assembly Syntax:       Rdd32=vmpyweh(Rss32,Rtt32):rnd:sat
   C Intrinsic Prototype: Word64 Q6_P_vmpyweh_PP_rnd_sat(Word64 Rss, Word64 Rtt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vmpyweh_PP_rnd_sat __builtin_HEXAGON_M2_mmpyl_rs0

/* ==========================================================================
   Assembly Syntax:       Rdd32=vmpyweh(Rss32,Rtt32):<<1:rnd:sat
   C Intrinsic Prototype: Word64 Q6_P_vmpyweh_PP_s1_rnd_sat(Word64 Rss, Word64 Rtt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vmpyweh_PP_s1_rnd_sat __builtin_HEXAGON_M2_mmpyl_rs1

/* ==========================================================================
   Assembly Syntax:       Rdd32=vmpyweh(Rss32,Rtt32):sat
   C Intrinsic Prototype: Word64 Q6_P_vmpyweh_PP_sat(Word64 Rss, Word64 Rtt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vmpyweh_PP_sat __builtin_HEXAGON_M2_mmpyl_s0

/* ==========================================================================
   Assembly Syntax:       Rdd32=vmpyweh(Rss32,Rtt32):<<1:sat
   C Intrinsic Prototype: Word64 Q6_P_vmpyweh_PP_s1_sat(Word64 Rss, Word64 Rtt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vmpyweh_PP_s1_sat __builtin_HEXAGON_M2_mmpyl_s1

/* ==========================================================================
   Assembly Syntax:       Rdd32=vmpywouh(Rss32,Rtt32):rnd:sat
   C Intrinsic Prototype: Word64 Q6_P_vmpywouh_PP_rnd_sat(Word64 Rss, Word64 Rtt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vmpywouh_PP_rnd_sat __builtin_HEXAGON_M2_mmpyuh_rs0

/* ==========================================================================
   Assembly Syntax:       Rdd32=vmpywouh(Rss32,Rtt32):<<1:rnd:sat
   C Intrinsic Prototype: Word64 Q6_P_vmpywouh_PP_s1_rnd_sat(Word64 Rss, Word64 Rtt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vmpywouh_PP_s1_rnd_sat __builtin_HEXAGON_M2_mmpyuh_rs1

/* ==========================================================================
   Assembly Syntax:       Rdd32=vmpywouh(Rss32,Rtt32):sat
   C Intrinsic Prototype: Word64 Q6_P_vmpywouh_PP_sat(Word64 Rss, Word64 Rtt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vmpywouh_PP_sat __builtin_HEXAGON_M2_mmpyuh_s0

/* ==========================================================================
   Assembly Syntax:       Rdd32=vmpywouh(Rss32,Rtt32):<<1:sat
   C Intrinsic Prototype: Word64 Q6_P_vmpywouh_PP_s1_sat(Word64 Rss, Word64 Rtt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vmpywouh_PP_s1_sat __builtin_HEXAGON_M2_mmpyuh_s1

/* ==========================================================================
   Assembly Syntax:       Rdd32=vmpyweuh(Rss32,Rtt32):rnd:sat
   C Intrinsic Prototype: Word64 Q6_P_vmpyweuh_PP_rnd_sat(Word64 Rss, Word64 Rtt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vmpyweuh_PP_rnd_sat __builtin_HEXAGON_M2_mmpyul_rs0

/* ==========================================================================
   Assembly Syntax:       Rdd32=vmpyweuh(Rss32,Rtt32):<<1:rnd:sat
   C Intrinsic Prototype: Word64 Q6_P_vmpyweuh_PP_s1_rnd_sat(Word64 Rss, Word64 Rtt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vmpyweuh_PP_s1_rnd_sat __builtin_HEXAGON_M2_mmpyul_rs1

/* ==========================================================================
   Assembly Syntax:       Rdd32=vmpyweuh(Rss32,Rtt32):sat
   C Intrinsic Prototype: Word64 Q6_P_vmpyweuh_PP_sat(Word64 Rss, Word64 Rtt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vmpyweuh_PP_sat __builtin_HEXAGON_M2_mmpyul_s0

/* ==========================================================================
   Assembly Syntax:       Rdd32=vmpyweuh(Rss32,Rtt32):<<1:sat
   C Intrinsic Prototype: Word64 Q6_P_vmpyweuh_PP_s1_sat(Word64 Rss, Word64 Rtt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_P_vmpyweuh_PP_s1_sat __builtin_HEXAGON_M2_mmpyul_s1

/* ==========================================================================
   Assembly Syntax:       Rx32+=mpy(Rs32.h,Rt32.h)
   C Intrinsic Prototype: Word32 Q6_R_mpyacc_RhRh(Word32 Rx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpyacc_RhRh __builtin_HEXAGON_M2_mpy_acc_hh_s0

/* ==========================================================================
   Assembly Syntax:       Rx32+=mpy(Rs32.h,Rt32.h):<<1
   C Intrinsic Prototype: Word32 Q6_R_mpyacc_RhRh_s1(Word32 Rx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpyacc_RhRh_s1 __builtin_HEXAGON_M2_mpy_acc_hh_s1

/* ==========================================================================
   Assembly Syntax:       Rx32+=mpy(Rs32.h,Rt32.l)
   C Intrinsic Prototype: Word32 Q6_R_mpyacc_RhRl(Word32 Rx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpyacc_RhRl __builtin_HEXAGON_M2_mpy_acc_hl_s0

/* ==========================================================================
   Assembly Syntax:       Rx32+=mpy(Rs32.h,Rt32.l):<<1
   C Intrinsic Prototype: Word32 Q6_R_mpyacc_RhRl_s1(Word32 Rx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpyacc_RhRl_s1 __builtin_HEXAGON_M2_mpy_acc_hl_s1

/* ==========================================================================
   Assembly Syntax:       Rx32+=mpy(Rs32.l,Rt32.h)
   C Intrinsic Prototype: Word32 Q6_R_mpyacc_RlRh(Word32 Rx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpyacc_RlRh __builtin_HEXAGON_M2_mpy_acc_lh_s0

/* ==========================================================================
   Assembly Syntax:       Rx32+=mpy(Rs32.l,Rt32.h):<<1
   C Intrinsic Prototype: Word32 Q6_R_mpyacc_RlRh_s1(Word32 Rx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpyacc_RlRh_s1 __builtin_HEXAGON_M2_mpy_acc_lh_s1

/* ==========================================================================
   Assembly Syntax:       Rx32+=mpy(Rs32.l,Rt32.l)
   C Intrinsic Prototype: Word32 Q6_R_mpyacc_RlRl(Word32 Rx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpyacc_RlRl __builtin_HEXAGON_M2_mpy_acc_ll_s0

/* ==========================================================================
   Assembly Syntax:       Rx32+=mpy(Rs32.l,Rt32.l):<<1
   C Intrinsic Prototype: Word32 Q6_R_mpyacc_RlRl_s1(Word32 Rx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpyacc_RlRl_s1 __builtin_HEXAGON_M2_mpy_acc_ll_s1

/* ==========================================================================
   Assembly Syntax:       Rx32+=mpy(Rs32.h,Rt32.h):sat
   C Intrinsic Prototype: Word32 Q6_R_mpyacc_RhRh_sat(Word32 Rx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpyacc_RhRh_sat __builtin_HEXAGON_M2_mpy_acc_sat_hh_s0

/* ==========================================================================
   Assembly Syntax:       Rx32+=mpy(Rs32.h,Rt32.h):<<1:sat
   C Intrinsic Prototype: Word32 Q6_R_mpyacc_RhRh_s1_sat(Word32 Rx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpyacc_RhRh_s1_sat __builtin_HEXAGON_M2_mpy_acc_sat_hh_s1

/* ==========================================================================
   Assembly Syntax:       Rx32+=mpy(Rs32.h,Rt32.l):sat
   C Intrinsic Prototype: Word32 Q6_R_mpyacc_RhRl_sat(Word32 Rx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpyacc_RhRl_sat __builtin_HEXAGON_M2_mpy_acc_sat_hl_s0

/* ==========================================================================
   Assembly Syntax:       Rx32+=mpy(Rs32.h,Rt32.l):<<1:sat
   C Intrinsic Prototype: Word32 Q6_R_mpyacc_RhRl_s1_sat(Word32 Rx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpyacc_RhRl_s1_sat __builtin_HEXAGON_M2_mpy_acc_sat_hl_s1

/* ==========================================================================
   Assembly Syntax:       Rx32+=mpy(Rs32.l,Rt32.h):sat
   C Intrinsic Prototype: Word32 Q6_R_mpyacc_RlRh_sat(Word32 Rx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpyacc_RlRh_sat __builtin_HEXAGON_M2_mpy_acc_sat_lh_s0

/* ==========================================================================
   Assembly Syntax:       Rx32+=mpy(Rs32.l,Rt32.h):<<1:sat
   C Intrinsic Prototype: Word32 Q6_R_mpyacc_RlRh_s1_sat(Word32 Rx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpyacc_RlRh_s1_sat __builtin_HEXAGON_M2_mpy_acc_sat_lh_s1

/* ==========================================================================
   Assembly Syntax:       Rx32+=mpy(Rs32.l,Rt32.l):sat
   C Intrinsic Prototype: Word32 Q6_R_mpyacc_RlRl_sat(Word32 Rx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpyacc_RlRl_sat __builtin_HEXAGON_M2_mpy_acc_sat_ll_s0

/* ==========================================================================
   Assembly Syntax:       Rx32+=mpy(Rs32.l,Rt32.l):<<1:sat
   C Intrinsic Prototype: Word32 Q6_R_mpyacc_RlRl_s1_sat(Word32 Rx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpyacc_RlRl_s1_sat __builtin_HEXAGON_M2_mpy_acc_sat_ll_s1

/* ==========================================================================
   Assembly Syntax:       Rd32=mpy(Rs32.h,Rt32.h)
   C Intrinsic Prototype: Word32 Q6_R_mpy_RhRh(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpy_RhRh __builtin_HEXAGON_M2_mpy_hh_s0

/* ==========================================================================
   Assembly Syntax:       Rd32=mpy(Rs32.h,Rt32.h):<<1
   C Intrinsic Prototype: Word32 Q6_R_mpy_RhRh_s1(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpy_RhRh_s1 __builtin_HEXAGON_M2_mpy_hh_s1

/* ==========================================================================
   Assembly Syntax:       Rd32=mpy(Rs32.h,Rt32.l)
   C Intrinsic Prototype: Word32 Q6_R_mpy_RhRl(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpy_RhRl __builtin_HEXAGON_M2_mpy_hl_s0

/* ==========================================================================
   Assembly Syntax:       Rd32=mpy(Rs32.h,Rt32.l):<<1
   C Intrinsic Prototype: Word32 Q6_R_mpy_RhRl_s1(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpy_RhRl_s1 __builtin_HEXAGON_M2_mpy_hl_s1

/* ==========================================================================
   Assembly Syntax:       Rd32=mpy(Rs32.l,Rt32.h)
   C Intrinsic Prototype: Word32 Q6_R_mpy_RlRh(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpy_RlRh __builtin_HEXAGON_M2_mpy_lh_s0

/* ==========================================================================
   Assembly Syntax:       Rd32=mpy(Rs32.l,Rt32.h):<<1
   C Intrinsic Prototype: Word32 Q6_R_mpy_RlRh_s1(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpy_RlRh_s1 __builtin_HEXAGON_M2_mpy_lh_s1

/* ==========================================================================
   Assembly Syntax:       Rd32=mpy(Rs32.l,Rt32.l)
   C Intrinsic Prototype: Word32 Q6_R_mpy_RlRl(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpy_RlRl __builtin_HEXAGON_M2_mpy_ll_s0

/* ==========================================================================
   Assembly Syntax:       Rd32=mpy(Rs32.l,Rt32.l):<<1
   C Intrinsic Prototype: Word32 Q6_R_mpy_RlRl_s1(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpy_RlRl_s1 __builtin_HEXAGON_M2_mpy_ll_s1

/* ==========================================================================
   Assembly Syntax:       Rx32-=mpy(Rs32.h,Rt32.h)
   C Intrinsic Prototype: Word32 Q6_R_mpynac_RhRh(Word32 Rx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpynac_RhRh __builtin_HEXAGON_M2_mpy_nac_hh_s0

/* ==========================================================================
   Assembly Syntax:       Rx32-=mpy(Rs32.h,Rt32.h):<<1
   C Intrinsic Prototype: Word32 Q6_R_mpynac_RhRh_s1(Word32 Rx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpynac_RhRh_s1 __builtin_HEXAGON_M2_mpy_nac_hh_s1

/* ==========================================================================
   Assembly Syntax:       Rx32-=mpy(Rs32.h,Rt32.l)
   C Intrinsic Prototype: Word32 Q6_R_mpynac_RhRl(Word32 Rx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpynac_RhRl __builtin_HEXAGON_M2_mpy_nac_hl_s0

/* ==========================================================================
   Assembly Syntax:       Rx32-=mpy(Rs32.h,Rt32.l):<<1
   C Intrinsic Prototype: Word32 Q6_R_mpynac_RhRl_s1(Word32 Rx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpynac_RhRl_s1 __builtin_HEXAGON_M2_mpy_nac_hl_s1

/* ==========================================================================
   Assembly Syntax:       Rx32-=mpy(Rs32.l,Rt32.h)
   C Intrinsic Prototype: Word32 Q6_R_mpynac_RlRh(Word32 Rx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpynac_RlRh __builtin_HEXAGON_M2_mpy_nac_lh_s0

/* ==========================================================================
   Assembly Syntax:       Rx32-=mpy(Rs32.l,Rt32.h):<<1
   C Intrinsic Prototype: Word32 Q6_R_mpynac_RlRh_s1(Word32 Rx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpynac_RlRh_s1 __builtin_HEXAGON_M2_mpy_nac_lh_s1

/* ==========================================================================
   Assembly Syntax:       Rx32-=mpy(Rs32.l,Rt32.l)
   C Intrinsic Prototype: Word32 Q6_R_mpynac_RlRl(Word32 Rx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpynac_RlRl __builtin_HEXAGON_M2_mpy_nac_ll_s0

/* ==========================================================================
   Assembly Syntax:       Rx32-=mpy(Rs32.l,Rt32.l):<<1
   C Intrinsic Prototype: Word32 Q6_R_mpynac_RlRl_s1(Word32 Rx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpynac_RlRl_s1 __builtin_HEXAGON_M2_mpy_nac_ll_s1

/* ==========================================================================
   Assembly Syntax:       Rx32-=mpy(Rs32.h,Rt32.h):sat
   C Intrinsic Prototype: Word32 Q6_R_mpynac_RhRh_sat(Word32 Rx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpynac_RhRh_sat __builtin_HEXAGON_M2_mpy_nac_sat_hh_s0

/* ==========================================================================
   Assembly Syntax:       Rx32-=mpy(Rs32.h,Rt32.h):<<1:sat
   C Intrinsic Prototype: Word32 Q6_R_mpynac_RhRh_s1_sat(Word32 Rx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpynac_RhRh_s1_sat __builtin_HEXAGON_M2_mpy_nac_sat_hh_s1

/* ==========================================================================
   Assembly Syntax:       Rx32-=mpy(Rs32.h,Rt32.l):sat
   C Intrinsic Prototype: Word32 Q6_R_mpynac_RhRl_sat(Word32 Rx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpynac_RhRl_sat __builtin_HEXAGON_M2_mpy_nac_sat_hl_s0

/* ==========================================================================
   Assembly Syntax:       Rx32-=mpy(Rs32.h,Rt32.l):<<1:sat
   C Intrinsic Prototype: Word32 Q6_R_mpynac_RhRl_s1_sat(Word32 Rx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpynac_RhRl_s1_sat __builtin_HEXAGON_M2_mpy_nac_sat_hl_s1

/* ==========================================================================
   Assembly Syntax:       Rx32-=mpy(Rs32.l,Rt32.h):sat
   C Intrinsic Prototype: Word32 Q6_R_mpynac_RlRh_sat(Word32 Rx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpynac_RlRh_sat __builtin_HEXAGON_M2_mpy_nac_sat_lh_s0

/* ==========================================================================
   Assembly Syntax:       Rx32-=mpy(Rs32.l,Rt32.h):<<1:sat
   C Intrinsic Prototype: Word32 Q6_R_mpynac_RlRh_s1_sat(Word32 Rx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpynac_RlRh_s1_sat __builtin_HEXAGON_M2_mpy_nac_sat_lh_s1

/* ==========================================================================
   Assembly Syntax:       Rx32-=mpy(Rs32.l,Rt32.l):sat
   C Intrinsic Prototype: Word32 Q6_R_mpynac_RlRl_sat(Word32 Rx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpynac_RlRl_sat __builtin_HEXAGON_M2_mpy_nac_sat_ll_s0

/* ==========================================================================
   Assembly Syntax:       Rx32-=mpy(Rs32.l,Rt32.l):<<1:sat
   C Intrinsic Prototype: Word32 Q6_R_mpynac_RlRl_s1_sat(Word32 Rx, Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpynac_RlRl_s1_sat __builtin_HEXAGON_M2_mpy_nac_sat_ll_s1

/* ==========================================================================
   Assembly Syntax:       Rd32=mpy(Rs32.h,Rt32.h):rnd
   C Intrinsic Prototype: Word32 Q6_R_mpy_RhRh_rnd(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpy_RhRh_rnd __builtin_HEXAGON_M2_mpy_rnd_hh_s0

/* ==========================================================================
   Assembly Syntax:       Rd32=mpy(Rs32.h,Rt32.h):<<1:rnd
   C Intrinsic Prototype: Word32 Q6_R_mpy_RhRh_s1_rnd(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpy_RhRh_s1_rnd __builtin_HEXAGON_M2_mpy_rnd_hh_s1

/* ==========================================================================
   Assembly Syntax:       Rd32=mpy(Rs32.h,Rt32.l):rnd
   C Intrinsic Prototype: Word32 Q6_R_mpy_RhRl_rnd(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpy_RhRl_rnd __builtin_HEXAGON_M2_mpy_rnd_hl_s0

/* ==========================================================================
   Assembly Syntax:       Rd32=mpy(Rs32.h,Rt32.l):<<1:rnd
   C Intrinsic Prototype: Word32 Q6_R_mpy_RhRl_s1_rnd(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpy_RhRl_s1_rnd __builtin_HEXAGON_M2_mpy_rnd_hl_s1

/* ==========================================================================
   Assembly Syntax:       Rd32=mpy(Rs32.l,Rt32.h):rnd
   C Intrinsic Prototype: Word32 Q6_R_mpy_RlRh_rnd(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpy_RlRh_rnd __builtin_HEXAGON_M2_mpy_rnd_lh_s0

/* ==========================================================================
   Assembly Syntax:       Rd32=mpy(Rs32.l,Rt32.h):<<1:rnd
   C Intrinsic Prototype: Word32 Q6_R_mpy_RlRh_s1_rnd(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpy_RlRh_s1_rnd __builtin_HEXAGON_M2_mpy_rnd_lh_s1

/* ==========================================================================
   Assembly Syntax:       Rd32=mpy(Rs32.l,Rt32.l):rnd
   C Intrinsic Prototype: Word32 Q6_R_mpy_RlRl_rnd(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpy_RlRl_rnd __builtin_HEXAGON_M2_mpy_rnd_ll_s0

/* ==========================================================================
   Assembly Syntax:       Rd32=mpy(Rs32.l,Rt32.l):<<1:rnd
   C Intrinsic Prototype: Word32 Q6_R_mpy_RlRl_s1_rnd(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpy_RlRl_s1_rnd __builtin_HEXAGON_M2_mpy_rnd_ll_s1

/* ==========================================================================
   Assembly Syntax:       Rd32=mpy(Rs32.h,Rt32.h):sat
   C Intrinsic Prototype: Word32 Q6_R_mpy_RhRh_sat(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpy_RhRh_sat __builtin_HEXAGON_M2_mpy_sat_hh_s0

/* ==========================================================================
   Assembly Syntax:       Rd32=mpy(Rs32.h,Rt32.h):<<1:sat
   C Intrinsic Prototype: Word32 Q6_R_mpy_RhRh_s1_sat(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpy_RhRh_s1_sat __builtin_HEXAGON_M2_mpy_sat_hh_s1

/* ==========================================================================
   Assembly Syntax:       Rd32=mpy(Rs32.h,Rt32.l):sat
   C Intrinsic Prototype: Word32 Q6_R_mpy_RhRl_sat(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpy_RhRl_sat __builtin_HEXAGON_M2_mpy_sat_hl_s0

/* ==========================================================================
   Assembly Syntax:       Rd32=mpy(Rs32.h,Rt32.l):<<1:sat
   C Intrinsic Prototype: Word32 Q6_R_mpy_RhRl_s1_sat(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpy_RhRl_s1_sat __builtin_HEXAGON_M2_mpy_sat_hl_s1

/* ==========================================================================
   Assembly Syntax:       Rd32=mpy(Rs32.l,Rt32.h):sat
   C Intrinsic Prototype: Word32 Q6_R_mpy_RlRh_sat(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpy_RlRh_sat __builtin_HEXAGON_M2_mpy_sat_lh_s0

/* ==========================================================================
   Assembly Syntax:       Rd32=mpy(Rs32.l,Rt32.h):<<1:sat
   C Intrinsic Prototype: Word32 Q6_R_mpy_RlRh_s1_sat(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpy_RlRh_s1_sat __builtin_HEXAGON_M2_mpy_sat_lh_s1

/* ==========================================================================
   Assembly Syntax:       Rd32=mpy(Rs32.l,Rt32.l):sat
   C Intrinsic Prototype: Word32 Q6_R_mpy_RlRl_sat(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpy_RlRl_sat __builtin_HEXAGON_M2_mpy_sat_ll_s0

/* ==========================================================================
   Assembly Syntax:       Rd32=mpy(Rs32.l,Rt32.l):<<1:sat
   C Intrinsic Prototype: Word32 Q6_R_mpy_RlRl_s1_sat(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpy_RlRl_s1_sat __builtin_HEXAGON_M2_mpy_sat_ll_s1

/* ==========================================================================
   Assembly Syntax:       Rd32=mpy(Rs32.h,Rt32.h):rnd:sat
   C Intrinsic Prototype: Word32 Q6_R_mpy_RhRh_rnd_sat(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpy_RhRh_rnd_sat __builtin_HEXAGON_M2_mpy_sat_rnd_hh_s0

/* ==========================================================================
   Assembly Syntax:       Rd32=mpy(Rs32.h,Rt32.h):<<1:rnd:sat
   C Intrinsic Prototype: Word32 Q6_R_mpy_RhRh_s1_rnd_sat(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpy_RhRh_s1_rnd_sat __builtin_HEXAGON_M2_mpy_sat_rnd_hh_s1

/* ==========================================================================
   Assembly Syntax:       Rd32=mpy(Rs32.h,Rt32.l):rnd:sat
   C Intrinsic Prototype: Word32 Q6_R_mpy_RhRl_rnd_sat(Word32 Rs, Word32 Rt)
   Instruction Type:      M
   Execution Slots:       SLOT23
   ========================================================================== */

#define Q6_R_mpy_RhRl_rnd_sat __builtin_HEXAGON_M2_mpy_sat_rnd_hl_s0