)]}'
{
  "commit": "192ef559fbfeeba2f9cc43252db3da1303e8f00b",
  "tree": "12fabf088f914fafaf9d5651010423003b3c0826",
  "parents": [
    "00086d64086043269c3ed1c15dc08f5b6d517292"
  ],
  "author": {
    "name": "Petar Avramovic",
    "email": "Petar.Avramovic@amd.com",
    "time": "Mon Jun 22 11:58:43 2026 +0200"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Mon Jun 22 11:58:43 2026 +0200"
  },
  "message": "AMDGPU/GlobalISel: Use AMDGPURegBankSelect + AMDGPURegBankLegalize by default (#203928)\n\nAMDGPU/GlobalISel: Use AMDGPURegBankSelect + AMDGPURegBankLegalize by default\n\nChange AMDGPU\u0027s default -global-isel pipeline to use AMDGPURegBankSelect\nand AMDGPURegBankLegalize (previously -global-isel -new-reg-bank-select)\nby default instead of RegBankSelect which uses AMDGPURegisterBankInfo.\n\n-global-isel pipeline that used RegBankSelect/AMDGPURegisterBankInfo is\nnow deprecated, since it could not generate functionally correct code in\nsome cases involving divergent control flow and phis.\n\n-new-reg-bank-select option does nothing and will be removed in followup\npatch.\n\nDelete regbankselect-mui.ll and regbankselect-mui-salu-float.ll, which\nexisted to compare the -global-isel vs -global-isel -new-reg-bank-select.\n\nTemporarily disable a couple of tests that are missing AMDGPURegBankLegalize\nsupport.",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "524966e156565670fbbb98550462978cfa154b48",
      "old_mode": 33188,
      "old_path": "llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp",
      "new_id": "94795c08d65b7393967ef08295cf7cbe2c7ad7a4",
      "new_mode": 33188,
      "new_path": "llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp"
    },
    {
      "type": "delete",
      "old_id": "f8f7f972f6c0a002388315674c65a68c5e99981e",
      "old_mode": 33188,
      "old_path": "llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-salu-float.ll",
      "new_id": "0000000000000000000000000000000000000000",
      "new_mode": 0,
      "new_path": "/dev/null"
    },
    {
      "type": "delete",
      "old_id": "fa280a852383bf8038b18ba5330806d3a8029957",
      "old_mode": 33188,
      "old_path": "llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui.ll",
      "new_id": "0000000000000000000000000000000000000000",
      "new_mode": 0,
      "new_path": "/dev/null"
    },
    {
      "type": "modify",
      "old_id": "631fdc7406918f363cd7bc56d1172d6e736852ab",
      "old_mode": 33188,
      "old_path": "llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitreplicate.ll",
      "new_id": "041399c66418e983c48379013c694a6cd5018047",
      "new_mode": 33188,
      "new_path": "llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitreplicate.ll"
    },
    {
      "type": "modify",
      "old_id": "f437cd2152f13b7f3d25f738154dfb8d46c344c7",
      "old_mode": 33188,
      "old_path": "llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.vote.ll",
      "new_id": "d232920d71e86355cb6bc369361e67f2cc0c088b",
      "new_mode": 33188,
      "new_path": "llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.vote.ll"
    },
    {
      "type": "modify",
      "old_id": "644d3e139b3dd6fed4735142381175be15d1c4e3",
      "old_mode": 33188,
      "old_path": "llvm/test/CodeGen/AMDGPU/maximumnum.ll",
      "new_id": "a39a3d35b7b541802a57a7ace518fe2dfce6e32f",
      "new_mode": 33188,
      "new_path": "llvm/test/CodeGen/AMDGPU/maximumnum.ll"
    },
    {
      "type": "modify",
      "old_id": "af48913e049953dfca3eeb1864861e9ce2cbd70c",
      "old_mode": 33188,
      "old_path": "llvm/test/CodeGen/AMDGPU/minimumnum.ll",
      "new_id": "a7ba719a455521fb986dd07c847fbbd17df5ec1e",
      "new_mode": 33188,
      "new_path": "llvm/test/CodeGen/AMDGPU/minimumnum.ll"
    },
    {
      "type": "modify",
      "old_id": "bbd87fad143e344cce252521333e923ecd12ce9b",
      "old_mode": 33188,
      "old_path": "llvm/test/CodeGen/AMDGPU/packed-u64.ll",
      "new_id": "ea3c4ce56ae523331c67b49fbdc955824ba801d5",
      "new_mode": 33188,
      "new_path": "llvm/test/CodeGen/AMDGPU/packed-u64.ll"
    }
  ]
}
