[RISCV] Support vector strict rounding operations.
The patch basically models custom lowering of base rounding operations to expand
rounding by coverting to ingter and coverting back to FP. The other one thing
the patch does is to covert sNan of the source to qNan.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D148519
diff --git a/llvm/test/CodeGen/RISCV/rvv/fceil-constrained-sdnode.ll b/llvm/test/CodeGen/RISCV/rvv/fceil-constrained-sdnode.ll
new file mode 100644
index 0000000..b6d2764
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/rvv/fceil-constrained-sdnode.ll
@@ -0,0 +1,335 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=ilp32d \
+; RUN: -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=lp64d \
+; RUN: -verify-machineinstrs < %s | FileCheck %s
+
+define <vscale x 1 x half> @ceil_nxv1f16(<vscale x 1 x half> %x) {
+; CHECK-LABEL: ceil_nxv1f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI0_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI0_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 3
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 1 x half> @llvm.experimental.constrained.ceil.nxv1f16(<vscale x 1 x half> %x, metadata !"fpexcept.strict")
+ ret <vscale x 1 x half> %a
+}
+declare <vscale x 1 x half> @llvm.experimental.constrained.ceil.nxv1f16(<vscale x 1 x half>, metadata)
+
+define <vscale x 2 x half> @ceil_nxv2f16(<vscale x 2 x half> %x) {
+; CHECK-LABEL: ceil_nxv2f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI1_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI1_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 3
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 2 x half> @llvm.experimental.constrained.ceil.nxv2f16(<vscale x 2 x half> %x, metadata !"fpexcept.strict")
+ ret <vscale x 2 x half> %a
+}
+declare <vscale x 2 x half> @llvm.experimental.constrained.ceil.nxv2f16(<vscale x 2 x half>, metadata)
+
+define <vscale x 4 x half> @ceil_nxv4f16(<vscale x 4 x half> %x) {
+; CHECK-LABEL: ceil_nxv4f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI2_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI2_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 3
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 4 x half> @llvm.experimental.constrained.ceil.nxv4f16(<vscale x 4 x half> %x, metadata !"fpexcept.strict")
+ ret <vscale x 4 x half> %a
+}
+declare <vscale x 4 x half> @llvm.experimental.constrained.ceil.nxv4f16(<vscale x 4 x half>, metadata)
+
+define <vscale x 8 x half> @ceil_nxv8f16(<vscale x 8 x half> %x) {
+; CHECK-LABEL: ceil_nxv8f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI3_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI3_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v10, v8
+; CHECK-NEXT: vmflt.vf v0, v10, fa5
+; CHECK-NEXT: fsrmi a0, 3
+; CHECK-NEXT: vfcvt.x.f.v v10, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 8 x half> @llvm.experimental.constrained.ceil.nxv8f16(<vscale x 8 x half> %x, metadata !"fpexcept.strict")
+ ret <vscale x 8 x half> %a
+}
+declare <vscale x 8 x half> @llvm.experimental.constrained.ceil.nxv8f16(<vscale x 8 x half>, metadata)
+
+define <vscale x 16 x half> @ceil_nxv16f16(<vscale x 16 x half> %x) {
+; CHECK-LABEL: ceil_nxv16f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI4_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI4_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v12, v8
+; CHECK-NEXT: vmflt.vf v0, v12, fa5
+; CHECK-NEXT: fsrmi a0, 3
+; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 16 x half> @llvm.experimental.constrained.ceil.nxv16f16(<vscale x 16 x half> %x, metadata !"fpexcept.strict")
+ ret <vscale x 16 x half> %a
+}
+declare <vscale x 16 x half> @llvm.experimental.constrained.ceil.nxv16f16(<vscale x 16 x half>, metadata)
+
+define <vscale x 32 x half> @ceil_nxv32f16(<vscale x 32 x half> %x) {
+; CHECK-LABEL: ceil_nxv32f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e16, m8, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI5_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI5_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v16, v8
+; CHECK-NEXT: vmflt.vf v0, v16, fa5
+; CHECK-NEXT: fsrmi a0, 3
+; CHECK-NEXT: vfcvt.x.f.v v16, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v16, v16, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, m8, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v16, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 32 x half> @llvm.experimental.constrained.ceil.nxv32f16(<vscale x 32 x half> %x, metadata !"fpexcept.strict")
+ ret <vscale x 32 x half> %a
+}
+declare <vscale x 32 x half> @llvm.experimental.constrained.ceil.nxv32f16(<vscale x 32 x half>, metadata)
+
+define <vscale x 1 x float> @ceil_nxv1f32(<vscale x 1 x float> %x) {
+; CHECK-LABEL: ceil_nxv1f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 3
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 1 x float> @llvm.experimental.constrained.ceil.nxv1f32(<vscale x 1 x float> %x, metadata !"fpexcept.strict")
+ ret <vscale x 1 x float> %a
+}
+declare <vscale x 1 x float> @llvm.experimental.constrained.ceil.nxv1f32(<vscale x 1 x float>, metadata)
+
+define <vscale x 2 x float> @ceil_nxv2f32(<vscale x 2 x float> %x) {
+; CHECK-LABEL: ceil_nxv2f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 3
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 2 x float> @llvm.experimental.constrained.ceil.nxv2f32(<vscale x 2 x float> %x, metadata !"fpexcept.strict")
+ ret <vscale x 2 x float> %a
+}
+declare <vscale x 2 x float> @llvm.experimental.constrained.ceil.nxv2f32(<vscale x 2 x float>, metadata)
+
+define <vscale x 4 x float> @ceil_nxv4f32(<vscale x 4 x float> %x) {
+; CHECK-LABEL: ceil_nxv4f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v10, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v10, fa5
+; CHECK-NEXT: fsrmi a0, 3
+; CHECK-NEXT: vfcvt.x.f.v v10, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 4 x float> @llvm.experimental.constrained.ceil.nxv4f32(<vscale x 4 x float> %x, metadata !"fpexcept.strict")
+ ret <vscale x 4 x float> %a
+}
+declare <vscale x 4 x float> @llvm.experimental.constrained.ceil.nxv4f32(<vscale x 4 x float>, metadata)
+
+define <vscale x 8 x float> @ceil_nxv8f32(<vscale x 8 x float> %x) {
+; CHECK-LABEL: ceil_nxv8f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v12, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v12, fa5
+; CHECK-NEXT: fsrmi a0, 3
+; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 8 x float> @llvm.experimental.constrained.ceil.nxv8f32(<vscale x 8 x float> %x, metadata !"fpexcept.strict")
+ ret <vscale x 8 x float> %a
+}
+declare <vscale x 8 x float> @llvm.experimental.constrained.ceil.nxv8f32(<vscale x 8 x float>, metadata)
+
+define <vscale x 16 x float> @ceil_nxv16f32(<vscale x 16 x float> %x) {
+; CHECK-LABEL: ceil_nxv16f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v16, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v16, fa5
+; CHECK-NEXT: fsrmi a0, 3
+; CHECK-NEXT: vfcvt.x.f.v v16, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v16, v16, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v16, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 16 x float> @llvm.experimental.constrained.ceil.nxv16f32(<vscale x 16 x float> %x, metadata !"fpexcept.strict")
+ ret <vscale x 16 x float> %a
+}
+declare <vscale x 16 x float> @llvm.experimental.constrained.ceil.nxv16f32(<vscale x 16 x float>, metadata)
+
+define <vscale x 1 x double> @ceil_nxv1f64(<vscale x 1 x double> %x) {
+; CHECK-LABEL: ceil_nxv1f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI11_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI11_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 3
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e64, m1, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 1 x double> @llvm.experimental.constrained.ceil.nxv1f64(<vscale x 1 x double> %x, metadata !"fpexcept.strict")
+ ret <vscale x 1 x double> %a
+}
+declare <vscale x 1 x double> @llvm.experimental.constrained.ceil.nxv1f64(<vscale x 1 x double>, metadata)
+
+define <vscale x 2 x double> @ceil_nxv2f64(<vscale x 2 x double> %x) {
+; CHECK-LABEL: ceil_nxv2f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI12_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI12_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v10, v8
+; CHECK-NEXT: vmflt.vf v0, v10, fa5
+; CHECK-NEXT: fsrmi a0, 3
+; CHECK-NEXT: vfcvt.x.f.v v10, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e64, m2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 2 x double> @llvm.experimental.constrained.ceil.nxv2f64(<vscale x 2 x double> %x, metadata !"fpexcept.strict")
+ ret <vscale x 2 x double> %a
+}
+declare <vscale x 2 x double> @llvm.experimental.constrained.ceil.nxv2f64(<vscale x 2 x double>, metadata)
+
+define <vscale x 4 x double> @ceil_nxv4f64(<vscale x 4 x double> %x) {
+; CHECK-LABEL: ceil_nxv4f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI13_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI13_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v12, v8
+; CHECK-NEXT: vmflt.vf v0, v12, fa5
+; CHECK-NEXT: fsrmi a0, 3
+; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e64, m4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 4 x double> @llvm.experimental.constrained.ceil.nxv4f64(<vscale x 4 x double> %x, metadata !"fpexcept.strict")
+ ret <vscale x 4 x double> %a
+}
+declare <vscale x 4 x double> @llvm.experimental.constrained.ceil.nxv4f64(<vscale x 4 x double>, metadata)
+
+define <vscale x 8 x double> @ceil_nxv8f64(<vscale x 8 x double> %x) {
+; CHECK-LABEL: ceil_nxv8f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI14_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI14_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v16, v8
+; CHECK-NEXT: vmflt.vf v0, v16, fa5
+; CHECK-NEXT: fsrmi a0, 3
+; CHECK-NEXT: vfcvt.x.f.v v16, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v16, v16, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e64, m8, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v16, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 8 x double> @llvm.experimental.constrained.ceil.nxv8f64(<vscale x 8 x double> %x, metadata !"fpexcept.strict")
+ ret <vscale x 8 x double> %a
+}
+declare <vscale x 8 x double> @llvm.experimental.constrained.ceil.nxv8f64(<vscale x 8 x double>, metadata)
diff --git a/llvm/test/CodeGen/RISCV/rvv/ffloor-constrained-sdnode.ll b/llvm/test/CodeGen/RISCV/rvv/ffloor-constrained-sdnode.ll
new file mode 100644
index 0000000..7610d91
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/rvv/ffloor-constrained-sdnode.ll
@@ -0,0 +1,335 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=ilp32d \
+; RUN: -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=lp64d \
+; RUN: -verify-machineinstrs < %s | FileCheck %s
+
+define <vscale x 1 x half> @floor_nxv1f16(<vscale x 1 x half> %x) {
+; CHECK-LABEL: floor_nxv1f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI0_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI0_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 2
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 1 x half> @llvm.experimental.constrained.floor.nxv1f16(<vscale x 1 x half> %x, metadata !"fpexcept.strict")
+ ret <vscale x 1 x half> %a
+}
+declare <vscale x 1 x half> @llvm.experimental.constrained.floor.nxv1f16(<vscale x 1 x half>, metadata)
+
+define <vscale x 2 x half> @floor_nxv2f16(<vscale x 2 x half> %x) {
+; CHECK-LABEL: floor_nxv2f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI1_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI1_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 2
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 2 x half> @llvm.experimental.constrained.floor.nxv2f16(<vscale x 2 x half> %x, metadata !"fpexcept.strict")
+ ret <vscale x 2 x half> %a
+}
+declare <vscale x 2 x half> @llvm.experimental.constrained.floor.nxv2f16(<vscale x 2 x half>, metadata)
+
+define <vscale x 4 x half> @floor_nxv4f16(<vscale x 4 x half> %x) {
+; CHECK-LABEL: floor_nxv4f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI2_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI2_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 2
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 4 x half> @llvm.experimental.constrained.floor.nxv4f16(<vscale x 4 x half> %x, metadata !"fpexcept.strict")
+ ret <vscale x 4 x half> %a
+}
+declare <vscale x 4 x half> @llvm.experimental.constrained.floor.nxv4f16(<vscale x 4 x half>, metadata)
+
+define <vscale x 8 x half> @floor_nxv8f16(<vscale x 8 x half> %x) {
+; CHECK-LABEL: floor_nxv8f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI3_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI3_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v10, v8
+; CHECK-NEXT: vmflt.vf v0, v10, fa5
+; CHECK-NEXT: fsrmi a0, 2
+; CHECK-NEXT: vfcvt.x.f.v v10, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 8 x half> @llvm.experimental.constrained.floor.nxv8f16(<vscale x 8 x half> %x, metadata !"fpexcept.strict")
+ ret <vscale x 8 x half> %a
+}
+declare <vscale x 8 x half> @llvm.experimental.constrained.floor.nxv8f16(<vscale x 8 x half>, metadata)
+
+define <vscale x 16 x half> @floor_nxv16f16(<vscale x 16 x half> %x) {
+; CHECK-LABEL: floor_nxv16f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI4_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI4_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v12, v8
+; CHECK-NEXT: vmflt.vf v0, v12, fa5
+; CHECK-NEXT: fsrmi a0, 2
+; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 16 x half> @llvm.experimental.constrained.floor.nxv16f16(<vscale x 16 x half> %x, metadata !"fpexcept.strict")
+ ret <vscale x 16 x half> %a
+}
+declare <vscale x 16 x half> @llvm.experimental.constrained.floor.nxv16f16(<vscale x 16 x half>, metadata)
+
+define <vscale x 32 x half> @floor_nxv32f16(<vscale x 32 x half> %x) {
+; CHECK-LABEL: floor_nxv32f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e16, m8, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI5_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI5_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v16, v8
+; CHECK-NEXT: vmflt.vf v0, v16, fa5
+; CHECK-NEXT: fsrmi a0, 2
+; CHECK-NEXT: vfcvt.x.f.v v16, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v16, v16, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, m8, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v16, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 32 x half> @llvm.experimental.constrained.floor.nxv32f16(<vscale x 32 x half> %x, metadata !"fpexcept.strict")
+ ret <vscale x 32 x half> %a
+}
+declare <vscale x 32 x half> @llvm.experimental.constrained.floor.nxv32f16(<vscale x 32 x half>, metadata)
+
+define <vscale x 1 x float> @floor_nxv1f32(<vscale x 1 x float> %x) {
+; CHECK-LABEL: floor_nxv1f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 2
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 1 x float> @llvm.experimental.constrained.floor.nxv1f32(<vscale x 1 x float> %x, metadata !"fpexcept.strict")
+ ret <vscale x 1 x float> %a
+}
+declare <vscale x 1 x float> @llvm.experimental.constrained.floor.nxv1f32(<vscale x 1 x float>, metadata)
+
+define <vscale x 2 x float> @floor_nxv2f32(<vscale x 2 x float> %x) {
+; CHECK-LABEL: floor_nxv2f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 2
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 2 x float> @llvm.experimental.constrained.floor.nxv2f32(<vscale x 2 x float> %x, metadata !"fpexcept.strict")
+ ret <vscale x 2 x float> %a
+}
+declare <vscale x 2 x float> @llvm.experimental.constrained.floor.nxv2f32(<vscale x 2 x float>, metadata)
+
+define <vscale x 4 x float> @floor_nxv4f32(<vscale x 4 x float> %x) {
+; CHECK-LABEL: floor_nxv4f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v10, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v10, fa5
+; CHECK-NEXT: fsrmi a0, 2
+; CHECK-NEXT: vfcvt.x.f.v v10, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 4 x float> @llvm.experimental.constrained.floor.nxv4f32(<vscale x 4 x float> %x, metadata !"fpexcept.strict")
+ ret <vscale x 4 x float> %a
+}
+declare <vscale x 4 x float> @llvm.experimental.constrained.floor.nxv4f32(<vscale x 4 x float>, metadata)
+
+define <vscale x 8 x float> @floor_nxv8f32(<vscale x 8 x float> %x) {
+; CHECK-LABEL: floor_nxv8f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v12, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v12, fa5
+; CHECK-NEXT: fsrmi a0, 2
+; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 8 x float> @llvm.experimental.constrained.floor.nxv8f32(<vscale x 8 x float> %x, metadata !"fpexcept.strict")
+ ret <vscale x 8 x float> %a
+}
+declare <vscale x 8 x float> @llvm.experimental.constrained.floor.nxv8f32(<vscale x 8 x float>, metadata)
+
+define <vscale x 16 x float> @floor_nxv16f32(<vscale x 16 x float> %x) {
+; CHECK-LABEL: floor_nxv16f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v16, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v16, fa5
+; CHECK-NEXT: fsrmi a0, 2
+; CHECK-NEXT: vfcvt.x.f.v v16, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v16, v16, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v16, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 16 x float> @llvm.experimental.constrained.floor.nxv16f32(<vscale x 16 x float> %x, metadata !"fpexcept.strict")
+ ret <vscale x 16 x float> %a
+}
+declare <vscale x 16 x float> @llvm.experimental.constrained.floor.nxv16f32(<vscale x 16 x float>, metadata)
+
+define <vscale x 1 x double> @floor_nxv1f64(<vscale x 1 x double> %x) {
+; CHECK-LABEL: floor_nxv1f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI11_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI11_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 2
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e64, m1, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 1 x double> @llvm.experimental.constrained.floor.nxv1f64(<vscale x 1 x double> %x, metadata !"fpexcept.strict")
+ ret <vscale x 1 x double> %a
+}
+declare <vscale x 1 x double> @llvm.experimental.constrained.floor.nxv1f64(<vscale x 1 x double>, metadata)
+
+define <vscale x 2 x double> @floor_nxv2f64(<vscale x 2 x double> %x) {
+; CHECK-LABEL: floor_nxv2f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI12_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI12_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v10, v8
+; CHECK-NEXT: vmflt.vf v0, v10, fa5
+; CHECK-NEXT: fsrmi a0, 2
+; CHECK-NEXT: vfcvt.x.f.v v10, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e64, m2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 2 x double> @llvm.experimental.constrained.floor.nxv2f64(<vscale x 2 x double> %x, metadata !"fpexcept.strict")
+ ret <vscale x 2 x double> %a
+}
+declare <vscale x 2 x double> @llvm.experimental.constrained.floor.nxv2f64(<vscale x 2 x double>, metadata)
+
+define <vscale x 4 x double> @floor_nxv4f64(<vscale x 4 x double> %x) {
+; CHECK-LABEL: floor_nxv4f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI13_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI13_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v12, v8
+; CHECK-NEXT: vmflt.vf v0, v12, fa5
+; CHECK-NEXT: fsrmi a0, 2
+; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e64, m4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 4 x double> @llvm.experimental.constrained.floor.nxv4f64(<vscale x 4 x double> %x, metadata !"fpexcept.strict")
+ ret <vscale x 4 x double> %a
+}
+declare <vscale x 4 x double> @llvm.experimental.constrained.floor.nxv4f64(<vscale x 4 x double>, metadata)
+
+define <vscale x 8 x double> @floor_nxv8f64(<vscale x 8 x double> %x) {
+; CHECK-LABEL: floor_nxv8f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI14_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI14_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v16, v8
+; CHECK-NEXT: vmflt.vf v0, v16, fa5
+; CHECK-NEXT: fsrmi a0, 2
+; CHECK-NEXT: vfcvt.x.f.v v16, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v16, v16, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e64, m8, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v16, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 8 x double> @llvm.experimental.constrained.floor.nxv8f64(<vscale x 8 x double> %x, metadata !"fpexcept.strict")
+ ret <vscale x 8 x double> %a
+}
+declare <vscale x 8 x double> @llvm.experimental.constrained.floor.nxv8f64(<vscale x 8 x double>, metadata)
diff --git a/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fceil-constrained-sdnode.ll b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fceil-constrained-sdnode.ll
new file mode 100644
index 0000000..dcbca9c
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fceil-constrained-sdnode.ll
@@ -0,0 +1,336 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=ilp32d \
+; RUN: -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=lp64d \
+; RUN: -verify-machineinstrs < %s | FileCheck %s
+
+define <1 x half> @ceil_v1f16(<1 x half> %x) {
+; CHECK-LABEL: ceil_v1f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 1, e16, mf4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI0_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI0_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 3
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <1 x half> @llvm.experimental.constrained.ceil.v1f16(<1 x half> %x, metadata !"fpexcept.strict")
+ ret <1 x half> %a
+}
+declare <1 x half> @llvm.experimental.constrained.ceil.v1f16(<1 x half>, metadata)
+
+define <2 x half> @ceil_v2f16(<2 x half> %x) {
+; CHECK-LABEL: ceil_v2f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI1_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI1_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 3
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <2 x half> @llvm.experimental.constrained.ceil.v2f16(<2 x half> %x, metadata !"fpexcept.strict")
+ ret <2 x half> %a
+}
+declare <2 x half> @llvm.experimental.constrained.ceil.v2f16(<2 x half>, metadata)
+
+define <4 x half> @ceil_v4f16(<4 x half> %x) {
+; CHECK-LABEL: ceil_v4f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI2_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI2_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 3
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <4 x half> @llvm.experimental.constrained.ceil.v4f16(<4 x half> %x, metadata !"fpexcept.strict")
+ ret <4 x half> %a
+}
+declare <4 x half> @llvm.experimental.constrained.ceil.v4f16(<4 x half>, metadata)
+
+define <8 x half> @ceil_v8f16(<8 x half> %x) {
+; CHECK-LABEL: ceil_v8f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI3_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI3_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 3
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <8 x half> @llvm.experimental.constrained.ceil.v8f16(<8 x half> %x, metadata !"fpexcept.strict")
+ ret <8 x half> %a
+}
+declare <8 x half> @llvm.experimental.constrained.ceil.v8f16(<8 x half>, metadata)
+
+define <16 x half> @ceil_v16f16(<16 x half> %x) {
+; CHECK-LABEL: ceil_v16f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 16, e16, m2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI4_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI4_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v10, v8
+; CHECK-NEXT: vmflt.vf v0, v10, fa5
+; CHECK-NEXT: fsrmi a0, 3
+; CHECK-NEXT: vfcvt.x.f.v v10, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <16 x half> @llvm.experimental.constrained.ceil.v16f16(<16 x half> %x, metadata !"fpexcept.strict")
+ ret <16 x half> %a
+}
+declare <16 x half> @llvm.experimental.constrained.ceil.v16f16(<16 x half>, metadata)
+
+define <32 x half> @ceil_v32f16(<32 x half> %x) {
+; CHECK-LABEL: ceil_v32f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: li a0, 32
+; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI5_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI5_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v12, v8
+; CHECK-NEXT: vmflt.vf v0, v12, fa5
+; CHECK-NEXT: fsrmi a0, 3
+; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <32 x half> @llvm.experimental.constrained.ceil.v32f16(<32 x half> %x, metadata !"fpexcept.strict")
+ ret <32 x half> %a
+}
+declare <32 x half> @llvm.experimental.constrained.ceil.v32f16(<32 x half>, metadata)
+
+define <1 x float> @ceil_v1f32(<1 x float> %x) {
+; CHECK-LABEL: ceil_v1f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 1, e32, mf2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 3
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <1 x float> @llvm.experimental.constrained.ceil.v1f32(<1 x float> %x, metadata !"fpexcept.strict")
+ ret <1 x float> %a
+}
+declare <1 x float> @llvm.experimental.constrained.ceil.v1f32(<1 x float>, metadata)
+
+define <2 x float> @ceil_v2f32(<2 x float> %x) {
+; CHECK-LABEL: ceil_v2f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 3
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <2 x float> @llvm.experimental.constrained.ceil.v2f32(<2 x float> %x, metadata !"fpexcept.strict")
+ ret <2 x float> %a
+}
+declare <2 x float> @llvm.experimental.constrained.ceil.v2f32(<2 x float>, metadata)
+
+define <4 x float> @ceil_v4f32(<4 x float> %x) {
+; CHECK-LABEL: ceil_v4f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 3
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <4 x float> @llvm.experimental.constrained.ceil.v4f32(<4 x float> %x, metadata !"fpexcept.strict")
+ ret <4 x float> %a
+}
+declare <4 x float> @llvm.experimental.constrained.ceil.v4f32(<4 x float>, metadata)
+
+define <8 x float> @ceil_v8f32(<8 x float> %x) {
+; CHECK-LABEL: ceil_v8f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v10, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v10, fa5
+; CHECK-NEXT: fsrmi a0, 3
+; CHECK-NEXT: vfcvt.x.f.v v10, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <8 x float> @llvm.experimental.constrained.ceil.v8f32(<8 x float> %x, metadata !"fpexcept.strict")
+ ret <8 x float> %a
+}
+declare <8 x float> @llvm.experimental.constrained.ceil.v8f32(<8 x float>, metadata)
+
+define <16 x float> @ceil_v16f32(<16 x float> %x) {
+; CHECK-LABEL: ceil_v16f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v12, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v12, fa5
+; CHECK-NEXT: fsrmi a0, 3
+; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <16 x float> @llvm.experimental.constrained.ceil.v16f32(<16 x float> %x, metadata !"fpexcept.strict")
+ ret <16 x float> %a
+}
+declare <16 x float> @llvm.experimental.constrained.ceil.v16f32(<16 x float>, metadata)
+
+define <1 x double> @ceil_v1f64(<1 x double> %x) {
+; CHECK-LABEL: ceil_v1f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 1, e64, m1, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI11_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI11_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 3
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e64, m1, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <1 x double> @llvm.experimental.constrained.ceil.v1f64(<1 x double> %x, metadata !"fpexcept.strict")
+ ret <1 x double> %a
+}
+declare <1 x double> @llvm.experimental.constrained.ceil.v1f64(<1 x double>, metadata)
+
+define <2 x double> @ceil_v2f64(<2 x double> %x) {
+; CHECK-LABEL: ceil_v2f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 2, e64, m1, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI12_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI12_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 3
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e64, m1, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <2 x double> @llvm.experimental.constrained.ceil.v2f64(<2 x double> %x, metadata !"fpexcept.strict")
+ ret <2 x double> %a
+}
+declare <2 x double> @llvm.experimental.constrained.ceil.v2f64(<2 x double>, metadata)
+
+define <4 x double> @ceil_v4f64(<4 x double> %x) {
+; CHECK-LABEL: ceil_v4f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI13_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI13_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v10, v8
+; CHECK-NEXT: vmflt.vf v0, v10, fa5
+; CHECK-NEXT: fsrmi a0, 3
+; CHECK-NEXT: vfcvt.x.f.v v10, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e64, m2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <4 x double> @llvm.experimental.constrained.ceil.v4f64(<4 x double> %x, metadata !"fpexcept.strict")
+ ret <4 x double> %a
+}
+declare <4 x double> @llvm.experimental.constrained.ceil.v4f64(<4 x double>, metadata)
+
+define <8 x double> @ceil_v8f64(<8 x double> %x) {
+; CHECK-LABEL: ceil_v8f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 8, e64, m4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI14_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI14_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v12, v8
+; CHECK-NEXT: vmflt.vf v0, v12, fa5
+; CHECK-NEXT: fsrmi a0, 3
+; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e64, m4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <8 x double> @llvm.experimental.constrained.ceil.v8f64(<8 x double> %x, metadata !"fpexcept.strict")
+ ret <8 x double> %a
+}
+declare <8 x double> @llvm.experimental.constrained.ceil.v8f64(<8 x double>, metadata)
diff --git a/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ffloor-constrained-sdnode.ll b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ffloor-constrained-sdnode.ll
new file mode 100644
index 0000000..751b5dc
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ffloor-constrained-sdnode.ll
@@ -0,0 +1,336 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=ilp32d \
+; RUN: -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=lp64d \
+; RUN: -verify-machineinstrs < %s | FileCheck %s
+
+define <1 x half> @floor_v1f16(<1 x half> %x) {
+; CHECK-LABEL: floor_v1f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 1, e16, mf4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI0_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI0_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 2
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <1 x half> @llvm.experimental.constrained.floor.v1f16(<1 x half> %x, metadata !"fpexcept.strict")
+ ret <1 x half> %a
+}
+declare <1 x half> @llvm.experimental.constrained.floor.v1f16(<1 x half>, metadata)
+
+define <2 x half> @floor_v2f16(<2 x half> %x) {
+; CHECK-LABEL: floor_v2f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI1_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI1_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 2
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <2 x half> @llvm.experimental.constrained.floor.v2f16(<2 x half> %x, metadata !"fpexcept.strict")
+ ret <2 x half> %a
+}
+declare <2 x half> @llvm.experimental.constrained.floor.v2f16(<2 x half>, metadata)
+
+define <4 x half> @floor_v4f16(<4 x half> %x) {
+; CHECK-LABEL: floor_v4f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI2_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI2_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 2
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <4 x half> @llvm.experimental.constrained.floor.v4f16(<4 x half> %x, metadata !"fpexcept.strict")
+ ret <4 x half> %a
+}
+declare <4 x half> @llvm.experimental.constrained.floor.v4f16(<4 x half>, metadata)
+
+define <8 x half> @floor_v8f16(<8 x half> %x) {
+; CHECK-LABEL: floor_v8f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI3_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI3_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 2
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <8 x half> @llvm.experimental.constrained.floor.v8f16(<8 x half> %x, metadata !"fpexcept.strict")
+ ret <8 x half> %a
+}
+declare <8 x half> @llvm.experimental.constrained.floor.v8f16(<8 x half>, metadata)
+
+define <16 x half> @floor_v16f16(<16 x half> %x) {
+; CHECK-LABEL: floor_v16f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 16, e16, m2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI4_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI4_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v10, v8
+; CHECK-NEXT: vmflt.vf v0, v10, fa5
+; CHECK-NEXT: fsrmi a0, 2
+; CHECK-NEXT: vfcvt.x.f.v v10, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <16 x half> @llvm.experimental.constrained.floor.v16f16(<16 x half> %x, metadata !"fpexcept.strict")
+ ret <16 x half> %a
+}
+declare <16 x half> @llvm.experimental.constrained.floor.v16f16(<16 x half>, metadata)
+
+define <32 x half> @floor_v32f16(<32 x half> %x) {
+; CHECK-LABEL: floor_v32f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: li a0, 32
+; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI5_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI5_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v12, v8
+; CHECK-NEXT: vmflt.vf v0, v12, fa5
+; CHECK-NEXT: fsrmi a0, 2
+; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <32 x half> @llvm.experimental.constrained.floor.v32f16(<32 x half> %x, metadata !"fpexcept.strict")
+ ret <32 x half> %a
+}
+declare <32 x half> @llvm.experimental.constrained.floor.v32f16(<32 x half>, metadata)
+
+define <1 x float> @floor_v1f32(<1 x float> %x) {
+; CHECK-LABEL: floor_v1f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 1, e32, mf2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 2
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <1 x float> @llvm.experimental.constrained.floor.v1f32(<1 x float> %x, metadata !"fpexcept.strict")
+ ret <1 x float> %a
+}
+declare <1 x float> @llvm.experimental.constrained.floor.v1f32(<1 x float>, metadata)
+
+define <2 x float> @floor_v2f32(<2 x float> %x) {
+; CHECK-LABEL: floor_v2f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 2
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <2 x float> @llvm.experimental.constrained.floor.v2f32(<2 x float> %x, metadata !"fpexcept.strict")
+ ret <2 x float> %a
+}
+declare <2 x float> @llvm.experimental.constrained.floor.v2f32(<2 x float>, metadata)
+
+define <4 x float> @floor_v4f32(<4 x float> %x) {
+; CHECK-LABEL: floor_v4f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 2
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <4 x float> @llvm.experimental.constrained.floor.v4f32(<4 x float> %x, metadata !"fpexcept.strict")
+ ret <4 x float> %a
+}
+declare <4 x float> @llvm.experimental.constrained.floor.v4f32(<4 x float>, metadata)
+
+define <8 x float> @floor_v8f32(<8 x float> %x) {
+; CHECK-LABEL: floor_v8f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v10, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v10, fa5
+; CHECK-NEXT: fsrmi a0, 2
+; CHECK-NEXT: vfcvt.x.f.v v10, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <8 x float> @llvm.experimental.constrained.floor.v8f32(<8 x float> %x, metadata !"fpexcept.strict")
+ ret <8 x float> %a
+}
+declare <8 x float> @llvm.experimental.constrained.floor.v8f32(<8 x float>, metadata)
+
+define <16 x float> @floor_v16f32(<16 x float> %x) {
+; CHECK-LABEL: floor_v16f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v12, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v12, fa5
+; CHECK-NEXT: fsrmi a0, 2
+; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <16 x float> @llvm.experimental.constrained.floor.v16f32(<16 x float> %x, metadata !"fpexcept.strict")
+ ret <16 x float> %a
+}
+declare <16 x float> @llvm.experimental.constrained.floor.v16f32(<16 x float>, metadata)
+
+define <1 x double> @floor_v1f64(<1 x double> %x) {
+; CHECK-LABEL: floor_v1f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 1, e64, m1, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI11_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI11_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 2
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e64, m1, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <1 x double> @llvm.experimental.constrained.floor.v1f64(<1 x double> %x, metadata !"fpexcept.strict")
+ ret <1 x double> %a
+}
+declare <1 x double> @llvm.experimental.constrained.floor.v1f64(<1 x double>, metadata)
+
+define <2 x double> @floor_v2f64(<2 x double> %x) {
+; CHECK-LABEL: floor_v2f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 2, e64, m1, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI12_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI12_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 2
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e64, m1, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <2 x double> @llvm.experimental.constrained.floor.v2f64(<2 x double> %x, metadata !"fpexcept.strict")
+ ret <2 x double> %a
+}
+declare <2 x double> @llvm.experimental.constrained.floor.v2f64(<2 x double>, metadata)
+
+define <4 x double> @floor_v4f64(<4 x double> %x) {
+; CHECK-LABEL: floor_v4f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI13_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI13_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v10, v8
+; CHECK-NEXT: vmflt.vf v0, v10, fa5
+; CHECK-NEXT: fsrmi a0, 2
+; CHECK-NEXT: vfcvt.x.f.v v10, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e64, m2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <4 x double> @llvm.experimental.constrained.floor.v4f64(<4 x double> %x, metadata !"fpexcept.strict")
+ ret <4 x double> %a
+}
+declare <4 x double> @llvm.experimental.constrained.floor.v4f64(<4 x double>, metadata)
+
+define <8 x double> @floor_v8f64(<8 x double> %x) {
+; CHECK-LABEL: floor_v8f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 8, e64, m4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI14_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI14_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v12, v8
+; CHECK-NEXT: vmflt.vf v0, v12, fa5
+; CHECK-NEXT: fsrmi a0, 2
+; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e64, m4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <8 x double> @llvm.experimental.constrained.floor.v8f64(<8 x double> %x, metadata !"fpexcept.strict")
+ ret <8 x double> %a
+}
+declare <8 x double> @llvm.experimental.constrained.floor.v8f64(<8 x double>, metadata)
diff --git a/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fnearbyint-constrained-sdnode.ll b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fnearbyint-constrained-sdnode.ll
new file mode 100644
index 0000000..28da30f
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fnearbyint-constrained-sdnode.ll
@@ -0,0 +1,282 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=ilp32d \
+; RUN: -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=lp64d \
+; RUN: -verify-machineinstrs < %s | FileCheck %s
+
+declare <2 x half> @llvm.experimental.constrained.nearbyint.v2f16(<2 x half>, metadata, metadata)
+
+define <2 x half> @nearbyint_v2f16(<2 x half> %v) {
+; CHECK-LABEL: nearbyint_v2f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI0_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI0_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: frflags a0
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: fsflags a0
+; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %r = call <2 x half> @llvm.experimental.constrained.nearbyint.v2f16(<2 x half> %v, metadata !"round.dynamic", metadata !"fpexcept.strict")
+ ret <2 x half> %r
+}
+
+declare <4 x half> @llvm.experimental.constrained.nearbyint.v4f16(<4 x half>, metadata, metadata)
+
+define <4 x half> @nearbyint_v4f16(<4 x half> %v) {
+; CHECK-LABEL: nearbyint_v4f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI1_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI1_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: frflags a0
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: fsflags a0
+; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %r = call <4 x half> @llvm.experimental.constrained.nearbyint.v4f16(<4 x half> %v, metadata !"round.dynamic", metadata !"fpexcept.strict")
+ ret <4 x half> %r
+}
+
+declare <8 x half> @llvm.experimental.constrained.nearbyint.v8f16(<8 x half>, metadata, metadata)
+
+define <8 x half> @nearbyint_v8f16(<8 x half> %v) {
+; CHECK-LABEL: nearbyint_v8f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI2_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI2_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: frflags a0
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: fsflags a0
+; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %r = call <8 x half> @llvm.experimental.constrained.nearbyint.v8f16(<8 x half> %v, metadata !"round.dynamic", metadata !"fpexcept.strict")
+ ret <8 x half> %r
+}
+
+declare <16 x half> @llvm.experimental.constrained.nearbyint.v16f16(<16 x half>, metadata, metadata)
+
+define <16 x half> @nearbyint_v16f16(<16 x half> %v) {
+; CHECK-LABEL: nearbyint_v16f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 16, e16, m2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI3_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI3_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v10, v8
+; CHECK-NEXT: vmflt.vf v0, v10, fa5
+; CHECK-NEXT: frflags a0
+; CHECK-NEXT: vfcvt.x.f.v v10, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t
+; CHECK-NEXT: fsflags a0
+; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t
+; CHECK-NEXT: ret
+ %r = call <16 x half> @llvm.experimental.constrained.nearbyint.v16f16(<16 x half> %v, metadata !"round.dynamic", metadata !"fpexcept.strict")
+ ret <16 x half> %r
+}
+
+declare <32 x half> @llvm.experimental.constrained.nearbyint.v32f16(<32 x half>, metadata, metadata)
+
+define <32 x half> @nearbyint_v32f16(<32 x half> %v) {
+; CHECK-LABEL: nearbyint_v32f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: li a0, 32
+; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI4_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI4_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v12, v8
+; CHECK-NEXT: vmflt.vf v0, v12, fa5
+; CHECK-NEXT: frflags a0
+; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
+; CHECK-NEXT: fsflags a0
+; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
+; CHECK-NEXT: ret
+ %r = call <32 x half> @llvm.experimental.constrained.nearbyint.v32f16(<32 x half> %v, metadata !"round.dynamic", metadata !"fpexcept.strict")
+ ret <32 x half> %r
+}
+
+declare <2 x float> @llvm.experimental.constrained.nearbyint.v2f32(<2 x float>, metadata, metadata)
+
+define <2 x float> @nearbyint_v2f32(<2 x float> %v) {
+; CHECK-LABEL: nearbyint_v2f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: frflags a0
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: fsflags a0
+; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %r = call <2 x float> @llvm.experimental.constrained.nearbyint.v2f32(<2 x float> %v, metadata !"round.dynamic", metadata !"fpexcept.strict")
+ ret <2 x float> %r
+}
+
+declare <4 x float> @llvm.experimental.constrained.nearbyint.v4f32(<4 x float>, metadata, metadata)
+
+define <4 x float> @nearbyint_v4f32(<4 x float> %v) {
+; CHECK-LABEL: nearbyint_v4f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: frflags a0
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: fsflags a0
+; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %r = call <4 x float> @llvm.experimental.constrained.nearbyint.v4f32(<4 x float> %v, metadata !"round.dynamic", metadata !"fpexcept.strict")
+ ret <4 x float> %r
+}
+
+declare <8 x float> @llvm.experimental.constrained.nearbyint.v8f32(<8 x float>, metadata, metadata)
+
+define <8 x float> @nearbyint_v8f32(<8 x float> %v) {
+; CHECK-LABEL: nearbyint_v8f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v10, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v10, fa5
+; CHECK-NEXT: frflags a0
+; CHECK-NEXT: vfcvt.x.f.v v10, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t
+; CHECK-NEXT: fsflags a0
+; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t
+; CHECK-NEXT: ret
+ %r = call <8 x float> @llvm.experimental.constrained.nearbyint.v8f32(<8 x float> %v, metadata !"round.dynamic", metadata !"fpexcept.strict")
+ ret <8 x float> %r
+}
+
+declare <16 x float> @llvm.experimental.constrained.nearbyint.v16f32(<16 x float>, metadata, metadata)
+
+define <16 x float> @nearbyint_v16f32(<16 x float> %v) {
+; CHECK-LABEL: nearbyint_v16f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v12, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v12, fa5
+; CHECK-NEXT: frflags a0
+; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
+; CHECK-NEXT: fsflags a0
+; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
+; CHECK-NEXT: ret
+ %r = call <16 x float> @llvm.experimental.constrained.nearbyint.v16f32(<16 x float> %v, metadata !"round.dynamic", metadata !"fpexcept.strict")
+ ret <16 x float> %r
+}
+
+declare <2 x double> @llvm.experimental.constrained.nearbyint.v2f64(<2 x double>, metadata, metadata)
+
+define <2 x double> @nearbyint_v2f64(<2 x double> %v) {
+; CHECK-LABEL: nearbyint_v2f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 2, e64, m1, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI9_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI9_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: frflags a0
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: fsflags a0
+; CHECK-NEXT: vsetvli zero, zero, e64, m1, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %r = call <2 x double> @llvm.experimental.constrained.nearbyint.v2f64(<2 x double> %v, metadata !"round.dynamic", metadata !"fpexcept.strict")
+ ret <2 x double> %r
+}
+
+declare <4 x double> @llvm.experimental.constrained.nearbyint.v4f64(<4 x double>, metadata, metadata)
+
+define <4 x double> @nearbyint_v4f64(<4 x double> %v) {
+; CHECK-LABEL: nearbyint_v4f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI10_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI10_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v10, v8
+; CHECK-NEXT: vmflt.vf v0, v10, fa5
+; CHECK-NEXT: frflags a0
+; CHECK-NEXT: vfcvt.x.f.v v10, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t
+; CHECK-NEXT: fsflags a0
+; CHECK-NEXT: vsetvli zero, zero, e64, m2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t
+; CHECK-NEXT: ret
+ %r = call <4 x double> @llvm.experimental.constrained.nearbyint.v4f64(<4 x double> %v, metadata !"round.dynamic", metadata !"fpexcept.strict")
+ ret <4 x double> %r
+}
+
+declare <8 x double> @llvm.experimental.constrained.nearbyint.v8f64(<8 x double>, metadata, metadata)
+
+define <8 x double> @nearbyint_v8f64(<8 x double> %v) {
+; CHECK-LABEL: nearbyint_v8f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 8, e64, m4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI11_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI11_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v12, v8
+; CHECK-NEXT: vmflt.vf v0, v12, fa5
+; CHECK-NEXT: frflags a0
+; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
+; CHECK-NEXT: fsflags a0
+; CHECK-NEXT: vsetvli zero, zero, e64, m4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
+; CHECK-NEXT: ret
+ %r = call <8 x double> @llvm.experimental.constrained.nearbyint.v8f64(<8 x double> %v, metadata !"round.dynamic", metadata !"fpexcept.strict")
+ ret <8 x double> %r
+}
diff --git a/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fround-costrained-sdnode.ll b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fround-costrained-sdnode.ll
new file mode 100644
index 0000000..6e8c0b7
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fround-costrained-sdnode.ll
@@ -0,0 +1,338 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=ilp32d \
+; RUN: -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=lp64d \
+; RUN: -verify-machineinstrs < %s | FileCheck %s
+
+; This file tests the code generation for `llvm.experimental.constrained.round.*` on scalable vector type.
+
+define <1 x half> @round_v1f16(<1 x half> %x) {
+; CHECK-LABEL: round_v1f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 1, e16, mf4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI0_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI0_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 4
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <1 x half> @llvm.experimental.constrained.round.v1f16(<1 x half> %x, metadata !"fpexcept.strict")
+ ret <1 x half> %a
+}
+declare <1 x half> @llvm.experimental.constrained.round.v1f16(<1 x half>, metadata)
+
+define <2 x half> @round_v2f16(<2 x half> %x) {
+; CHECK-LABEL: round_v2f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI1_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI1_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 4
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <2 x half> @llvm.experimental.constrained.round.v2f16(<2 x half> %x, metadata !"fpexcept.strict")
+ ret <2 x half> %a
+}
+declare <2 x half> @llvm.experimental.constrained.round.v2f16(<2 x half>, metadata)
+
+define <4 x half> @round_v4f16(<4 x half> %x) {
+; CHECK-LABEL: round_v4f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI2_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI2_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 4
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <4 x half> @llvm.experimental.constrained.round.v4f16(<4 x half> %x, metadata !"fpexcept.strict")
+ ret <4 x half> %a
+}
+declare <4 x half> @llvm.experimental.constrained.round.v4f16(<4 x half>, metadata)
+
+define <8 x half> @round_v8f16(<8 x half> %x) {
+; CHECK-LABEL: round_v8f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI3_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI3_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 4
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <8 x half> @llvm.experimental.constrained.round.v8f16(<8 x half> %x, metadata !"fpexcept.strict")
+ ret <8 x half> %a
+}
+declare <8 x half> @llvm.experimental.constrained.round.v8f16(<8 x half>, metadata)
+
+define <16 x half> @round_v16f16(<16 x half> %x) {
+; CHECK-LABEL: round_v16f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 16, e16, m2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI4_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI4_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v10, v8
+; CHECK-NEXT: vmflt.vf v0, v10, fa5
+; CHECK-NEXT: fsrmi a0, 4
+; CHECK-NEXT: vfcvt.x.f.v v10, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <16 x half> @llvm.experimental.constrained.round.v16f16(<16 x half> %x, metadata !"fpexcept.strict")
+ ret <16 x half> %a
+}
+declare <16 x half> @llvm.experimental.constrained.round.v16f16(<16 x half>, metadata)
+
+define <32 x half> @round_v32f16(<32 x half> %x) {
+; CHECK-LABEL: round_v32f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: li a0, 32
+; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI5_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI5_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v12, v8
+; CHECK-NEXT: vmflt.vf v0, v12, fa5
+; CHECK-NEXT: fsrmi a0, 4
+; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <32 x half> @llvm.experimental.constrained.round.v32f16(<32 x half> %x, metadata !"fpexcept.strict")
+ ret <32 x half> %a
+}
+declare <32 x half> @llvm.experimental.constrained.round.v32f16(<32 x half>, metadata)
+
+define <1 x float> @round_v1f32(<1 x float> %x) {
+; CHECK-LABEL: round_v1f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 1, e32, mf2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 4
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <1 x float> @llvm.experimental.constrained.round.v1f32(<1 x float> %x, metadata !"fpexcept.strict")
+ ret <1 x float> %a
+}
+declare <1 x float> @llvm.experimental.constrained.round.v1f32(<1 x float>, metadata)
+
+define <2 x float> @round_v2f32(<2 x float> %x) {
+; CHECK-LABEL: round_v2f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 4
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <2 x float> @llvm.experimental.constrained.round.v2f32(<2 x float> %x, metadata !"fpexcept.strict")
+ ret <2 x float> %a
+}
+declare <2 x float> @llvm.experimental.constrained.round.v2f32(<2 x float>, metadata)
+
+define <4 x float> @round_v4f32(<4 x float> %x) {
+; CHECK-LABEL: round_v4f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 4
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <4 x float> @llvm.experimental.constrained.round.v4f32(<4 x float> %x, metadata !"fpexcept.strict")
+ ret <4 x float> %a
+}
+declare <4 x float> @llvm.experimental.constrained.round.v4f32(<4 x float>, metadata)
+
+define <8 x float> @round_v8f32(<8 x float> %x) {
+; CHECK-LABEL: round_v8f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v10, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v10, fa5
+; CHECK-NEXT: fsrmi a0, 4
+; CHECK-NEXT: vfcvt.x.f.v v10, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <8 x float> @llvm.experimental.constrained.round.v8f32(<8 x float> %x, metadata !"fpexcept.strict")
+ ret <8 x float> %a
+}
+declare <8 x float> @llvm.experimental.constrained.round.v8f32(<8 x float>, metadata)
+
+define <16 x float> @round_v16f32(<16 x float> %x) {
+; CHECK-LABEL: round_v16f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v12, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v12, fa5
+; CHECK-NEXT: fsrmi a0, 4
+; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <16 x float> @llvm.experimental.constrained.round.v16f32(<16 x float> %x, metadata !"fpexcept.strict")
+ ret <16 x float> %a
+}
+declare <16 x float> @llvm.experimental.constrained.round.v16f32(<16 x float>, metadata)
+
+define <1 x double> @round_v1f64(<1 x double> %x) {
+; CHECK-LABEL: round_v1f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 1, e64, m1, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI11_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI11_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 4
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e64, m1, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <1 x double> @llvm.experimental.constrained.round.v1f64(<1 x double> %x, metadata !"fpexcept.strict")
+ ret <1 x double> %a
+}
+declare <1 x double> @llvm.experimental.constrained.round.v1f64(<1 x double>, metadata)
+
+define <2 x double> @round_v2f64(<2 x double> %x) {
+; CHECK-LABEL: round_v2f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 2, e64, m1, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI12_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI12_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 4
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e64, m1, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <2 x double> @llvm.experimental.constrained.round.v2f64(<2 x double> %x, metadata !"fpexcept.strict")
+ ret <2 x double> %a
+}
+declare <2 x double> @llvm.experimental.constrained.round.v2f64(<2 x double>, metadata)
+
+define <4 x double> @round_v4f64(<4 x double> %x) {
+; CHECK-LABEL: round_v4f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI13_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI13_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v10, v8
+; CHECK-NEXT: vmflt.vf v0, v10, fa5
+; CHECK-NEXT: fsrmi a0, 4
+; CHECK-NEXT: vfcvt.x.f.v v10, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e64, m2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <4 x double> @llvm.experimental.constrained.round.v4f64(<4 x double> %x, metadata !"fpexcept.strict")
+ ret <4 x double> %a
+}
+declare <4 x double> @llvm.experimental.constrained.round.v4f64(<4 x double>, metadata)
+
+define <8 x double> @round_v8f64(<8 x double> %x) {
+; CHECK-LABEL: round_v8f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 8, e64, m4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI14_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI14_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v12, v8
+; CHECK-NEXT: vmflt.vf v0, v12, fa5
+; CHECK-NEXT: fsrmi a0, 4
+; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e64, m4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <8 x double> @llvm.experimental.constrained.round.v8f64(<8 x double> %x, metadata !"fpexcept.strict")
+ ret <8 x double> %a
+}
+declare <8 x double> @llvm.experimental.constrained.round.v8f64(<8 x double>, metadata)
diff --git a/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-froundeven-constrained-sdnode.ll b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-froundeven-constrained-sdnode.ll
new file mode 100644
index 0000000..a4e6fe6
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-froundeven-constrained-sdnode.ll
@@ -0,0 +1,338 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=ilp32d \
+; RUN: -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=lp64d \
+; RUN: -verify-machineinstrs < %s | FileCheck %s
+
+; This file tests the code generation for `llvm.experimental.constrained.roundeven.*` on scalable vector type.
+
+define <1 x half> @roundeven_v1f16(<1 x half> %x) {
+; CHECK-LABEL: roundeven_v1f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 1, e16, mf4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI0_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI0_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 0
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <1 x half> @llvm.experimental.constrained.roundeven.v1f16(<1 x half> %x, metadata !"fpexcept.strict")
+ ret <1 x half> %a
+}
+declare <1 x half> @llvm.experimental.constrained.roundeven.v1f16(<1 x half>, metadata)
+
+define <2 x half> @roundeven_v2f16(<2 x half> %x) {
+; CHECK-LABEL: roundeven_v2f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI1_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI1_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 0
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <2 x half> @llvm.experimental.constrained.roundeven.v2f16(<2 x half> %x, metadata !"fpexcept.strict")
+ ret <2 x half> %a
+}
+declare <2 x half> @llvm.experimental.constrained.roundeven.v2f16(<2 x half>, metadata)
+
+define <4 x half> @roundeven_v4f16(<4 x half> %x) {
+; CHECK-LABEL: roundeven_v4f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI2_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI2_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 0
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <4 x half> @llvm.experimental.constrained.roundeven.v4f16(<4 x half> %x, metadata !"fpexcept.strict")
+ ret <4 x half> %a
+}
+declare <4 x half> @llvm.experimental.constrained.roundeven.v4f16(<4 x half>, metadata)
+
+define <8 x half> @roundeven_v8f16(<8 x half> %x) {
+; CHECK-LABEL: roundeven_v8f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI3_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI3_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 0
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <8 x half> @llvm.experimental.constrained.roundeven.v8f16(<8 x half> %x, metadata !"fpexcept.strict")
+ ret <8 x half> %a
+}
+declare <8 x half> @llvm.experimental.constrained.roundeven.v8f16(<8 x half>, metadata)
+
+define <16 x half> @roundeven_v16f16(<16 x half> %x) {
+; CHECK-LABEL: roundeven_v16f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 16, e16, m2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI4_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI4_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v10, v8
+; CHECK-NEXT: vmflt.vf v0, v10, fa5
+; CHECK-NEXT: fsrmi a0, 0
+; CHECK-NEXT: vfcvt.x.f.v v10, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <16 x half> @llvm.experimental.constrained.roundeven.v16f16(<16 x half> %x, metadata !"fpexcept.strict")
+ ret <16 x half> %a
+}
+declare <16 x half> @llvm.experimental.constrained.roundeven.v16f16(<16 x half>, metadata)
+
+define <32 x half> @roundeven_v32f16(<32 x half> %x) {
+; CHECK-LABEL: roundeven_v32f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: li a0, 32
+; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI5_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI5_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v12, v8
+; CHECK-NEXT: vmflt.vf v0, v12, fa5
+; CHECK-NEXT: fsrmi a0, 0
+; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <32 x half> @llvm.experimental.constrained.roundeven.v32f16(<32 x half> %x, metadata !"fpexcept.strict")
+ ret <32 x half> %a
+}
+declare <32 x half> @llvm.experimental.constrained.roundeven.v32f16(<32 x half>, metadata)
+
+define <1 x float> @roundeven_v1f32(<1 x float> %x) {
+; CHECK-LABEL: roundeven_v1f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 1, e32, mf2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 0
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <1 x float> @llvm.experimental.constrained.roundeven.v1f32(<1 x float> %x, metadata !"fpexcept.strict")
+ ret <1 x float> %a
+}
+declare <1 x float> @llvm.experimental.constrained.roundeven.v1f32(<1 x float>, metadata)
+
+define <2 x float> @roundeven_v2f32(<2 x float> %x) {
+; CHECK-LABEL: roundeven_v2f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 0
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <2 x float> @llvm.experimental.constrained.roundeven.v2f32(<2 x float> %x, metadata !"fpexcept.strict")
+ ret <2 x float> %a
+}
+declare <2 x float> @llvm.experimental.constrained.roundeven.v2f32(<2 x float>, metadata)
+
+define <4 x float> @roundeven_v4f32(<4 x float> %x) {
+; CHECK-LABEL: roundeven_v4f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 0
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <4 x float> @llvm.experimental.constrained.roundeven.v4f32(<4 x float> %x, metadata !"fpexcept.strict")
+ ret <4 x float> %a
+}
+declare <4 x float> @llvm.experimental.constrained.roundeven.v4f32(<4 x float>, metadata)
+
+define <8 x float> @roundeven_v8f32(<8 x float> %x) {
+; CHECK-LABEL: roundeven_v8f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v10, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v10, fa5
+; CHECK-NEXT: fsrmi a0, 0
+; CHECK-NEXT: vfcvt.x.f.v v10, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <8 x float> @llvm.experimental.constrained.roundeven.v8f32(<8 x float> %x, metadata !"fpexcept.strict")
+ ret <8 x float> %a
+}
+declare <8 x float> @llvm.experimental.constrained.roundeven.v8f32(<8 x float>, metadata)
+
+define <16 x float> @roundeven_v16f32(<16 x float> %x) {
+; CHECK-LABEL: roundeven_v16f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v12, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v12, fa5
+; CHECK-NEXT: fsrmi a0, 0
+; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <16 x float> @llvm.experimental.constrained.roundeven.v16f32(<16 x float> %x, metadata !"fpexcept.strict")
+ ret <16 x float> %a
+}
+declare <16 x float> @llvm.experimental.constrained.roundeven.v16f32(<16 x float>, metadata)
+
+define <1 x double> @roundeven_v1f64(<1 x double> %x) {
+; CHECK-LABEL: roundeven_v1f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 1, e64, m1, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI11_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI11_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 0
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e64, m1, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <1 x double> @llvm.experimental.constrained.roundeven.v1f64(<1 x double> %x, metadata !"fpexcept.strict")
+ ret <1 x double> %a
+}
+declare <1 x double> @llvm.experimental.constrained.roundeven.v1f64(<1 x double>, metadata)
+
+define <2 x double> @roundeven_v2f64(<2 x double> %x) {
+; CHECK-LABEL: roundeven_v2f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 2, e64, m1, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI12_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI12_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 0
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e64, m1, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <2 x double> @llvm.experimental.constrained.roundeven.v2f64(<2 x double> %x, metadata !"fpexcept.strict")
+ ret <2 x double> %a
+}
+declare <2 x double> @llvm.experimental.constrained.roundeven.v2f64(<2 x double>, metadata)
+
+define <4 x double> @roundeven_v4f64(<4 x double> %x) {
+; CHECK-LABEL: roundeven_v4f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI13_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI13_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v10, v8
+; CHECK-NEXT: vmflt.vf v0, v10, fa5
+; CHECK-NEXT: fsrmi a0, 0
+; CHECK-NEXT: vfcvt.x.f.v v10, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e64, m2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <4 x double> @llvm.experimental.constrained.roundeven.v4f64(<4 x double> %x, metadata !"fpexcept.strict")
+ ret <4 x double> %a
+}
+declare <4 x double> @llvm.experimental.constrained.roundeven.v4f64(<4 x double>, metadata)
+
+define <8 x double> @roundeven_v8f64(<8 x double> %x) {
+; CHECK-LABEL: roundeven_v8f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 8, e64, m4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI14_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI14_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v12, v8
+; CHECK-NEXT: vmflt.vf v0, v12, fa5
+; CHECK-NEXT: fsrmi a0, 0
+; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e64, m4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <8 x double> @llvm.experimental.constrained.roundeven.v8f64(<8 x double> %x, metadata !"fpexcept.strict")
+ ret <8 x double> %a
+}
+declare <8 x double> @llvm.experimental.constrained.roundeven.v8f64(<8 x double>, metadata)
diff --git a/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ftrunc-constrained-sdnode.ll b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ftrunc-constrained-sdnode.ll
new file mode 100644
index 0000000..7c43e28
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ftrunc-constrained-sdnode.ll
@@ -0,0 +1,306 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=ilp32d \
+; RUN: -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=lp64d \
+; RUN: -verify-machineinstrs < %s | FileCheck %s
+
+define <1 x half> @trunc_v1f16(<1 x half> %x) {
+; CHECK-LABEL: trunc_v1f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 1, e16, mf4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI0_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI0_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: vfcvt.rtz.x.f.v v9, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <1 x half> @llvm.experimental.constrained.trunc.v1f16(<1 x half> %x, metadata !"fpexcept.strict")
+ ret <1 x half> %a
+}
+declare <1 x half> @llvm.experimental.constrained.trunc.v1f16(<1 x half>, metadata)
+
+define <2 x half> @trunc_v2f16(<2 x half> %x) {
+; CHECK-LABEL: trunc_v2f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI1_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI1_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: vfcvt.rtz.x.f.v v9, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <2 x half> @llvm.experimental.constrained.trunc.v2f16(<2 x half> %x, metadata !"fpexcept.strict")
+ ret <2 x half> %a
+}
+declare <2 x half> @llvm.experimental.constrained.trunc.v2f16(<2 x half>, metadata)
+
+define <4 x half> @trunc_v4f16(<4 x half> %x) {
+; CHECK-LABEL: trunc_v4f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI2_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI2_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: vfcvt.rtz.x.f.v v9, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <4 x half> @llvm.experimental.constrained.trunc.v4f16(<4 x half> %x, metadata !"fpexcept.strict")
+ ret <4 x half> %a
+}
+declare <4 x half> @llvm.experimental.constrained.trunc.v4f16(<4 x half>, metadata)
+
+define <8 x half> @trunc_v8f16(<8 x half> %x) {
+; CHECK-LABEL: trunc_v8f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI3_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI3_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: vfcvt.rtz.x.f.v v9, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <8 x half> @llvm.experimental.constrained.trunc.v8f16(<8 x half> %x, metadata !"fpexcept.strict")
+ ret <8 x half> %a
+}
+declare <8 x half> @llvm.experimental.constrained.trunc.v8f16(<8 x half>, metadata)
+
+define <16 x half> @trunc_v16f16(<16 x half> %x) {
+; CHECK-LABEL: trunc_v16f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 16, e16, m2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI4_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI4_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v10, v8
+; CHECK-NEXT: vmflt.vf v0, v10, fa5
+; CHECK-NEXT: vfcvt.rtz.x.f.v v10, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <16 x half> @llvm.experimental.constrained.trunc.v16f16(<16 x half> %x, metadata !"fpexcept.strict")
+ ret <16 x half> %a
+}
+declare <16 x half> @llvm.experimental.constrained.trunc.v16f16(<16 x half>, metadata)
+
+define <32 x half> @trunc_v32f16(<32 x half> %x) {
+; CHECK-LABEL: trunc_v32f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: li a0, 32
+; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI5_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI5_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v12, v8
+; CHECK-NEXT: vmflt.vf v0, v12, fa5
+; CHECK-NEXT: vfcvt.rtz.x.f.v v12, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <32 x half> @llvm.experimental.constrained.trunc.v32f16(<32 x half> %x, metadata !"fpexcept.strict")
+ ret <32 x half> %a
+}
+declare <32 x half> @llvm.experimental.constrained.trunc.v32f16(<32 x half>, metadata)
+
+define <1 x float> @trunc_v1f32(<1 x float> %x) {
+; CHECK-LABEL: trunc_v1f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 1, e32, mf2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: vfcvt.rtz.x.f.v v9, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <1 x float> @llvm.experimental.constrained.trunc.v1f32(<1 x float> %x, metadata !"fpexcept.strict")
+ ret <1 x float> %a
+}
+declare <1 x float> @llvm.experimental.constrained.trunc.v1f32(<1 x float>, metadata)
+
+define <2 x float> @trunc_v2f32(<2 x float> %x) {
+; CHECK-LABEL: trunc_v2f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: vfcvt.rtz.x.f.v v9, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <2 x float> @llvm.experimental.constrained.trunc.v2f32(<2 x float> %x, metadata !"fpexcept.strict")
+ ret <2 x float> %a
+}
+declare <2 x float> @llvm.experimental.constrained.trunc.v2f32(<2 x float>, metadata)
+
+define <4 x float> @trunc_v4f32(<4 x float> %x) {
+; CHECK-LABEL: trunc_v4f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: vfcvt.rtz.x.f.v v9, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <4 x float> @llvm.experimental.constrained.trunc.v4f32(<4 x float> %x, metadata !"fpexcept.strict")
+ ret <4 x float> %a
+}
+declare <4 x float> @llvm.experimental.constrained.trunc.v4f32(<4 x float>, metadata)
+
+define <8 x float> @trunc_v8f32(<8 x float> %x) {
+; CHECK-LABEL: trunc_v8f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v10, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v10, fa5
+; CHECK-NEXT: vfcvt.rtz.x.f.v v10, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <8 x float> @llvm.experimental.constrained.trunc.v8f32(<8 x float> %x, metadata !"fpexcept.strict")
+ ret <8 x float> %a
+}
+declare <8 x float> @llvm.experimental.constrained.trunc.v8f32(<8 x float>, metadata)
+
+define <16 x float> @trunc_v16f32(<16 x float> %x) {
+; CHECK-LABEL: trunc_v16f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v12, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v12, fa5
+; CHECK-NEXT: vfcvt.rtz.x.f.v v12, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <16 x float> @llvm.experimental.constrained.trunc.v16f32(<16 x float> %x, metadata !"fpexcept.strict")
+ ret <16 x float> %a
+}
+declare <16 x float> @llvm.experimental.constrained.trunc.v16f32(<16 x float>, metadata)
+
+define <1 x double> @trunc_v1f64(<1 x double> %x) {
+; CHECK-LABEL: trunc_v1f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 1, e64, m1, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI11_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI11_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: vfcvt.rtz.x.f.v v9, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e64, m1, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <1 x double> @llvm.experimental.constrained.trunc.v1f64(<1 x double> %x, metadata !"fpexcept.strict")
+ ret <1 x double> %a
+}
+declare <1 x double> @llvm.experimental.constrained.trunc.v1f64(<1 x double>, metadata)
+
+define <2 x double> @trunc_v2f64(<2 x double> %x) {
+; CHECK-LABEL: trunc_v2f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 2, e64, m1, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI12_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI12_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: vfcvt.rtz.x.f.v v9, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e64, m1, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <2 x double> @llvm.experimental.constrained.trunc.v2f64(<2 x double> %x, metadata !"fpexcept.strict")
+ ret <2 x double> %a
+}
+declare <2 x double> @llvm.experimental.constrained.trunc.v2f64(<2 x double>, metadata)
+
+define <4 x double> @trunc_v4f64(<4 x double> %x) {
+; CHECK-LABEL: trunc_v4f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI13_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI13_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v10, v8
+; CHECK-NEXT: vmflt.vf v0, v10, fa5
+; CHECK-NEXT: vfcvt.rtz.x.f.v v10, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e64, m2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <4 x double> @llvm.experimental.constrained.trunc.v4f64(<4 x double> %x, metadata !"fpexcept.strict")
+ ret <4 x double> %a
+}
+declare <4 x double> @llvm.experimental.constrained.trunc.v4f64(<4 x double>, metadata)
+
+define <8 x double> @trunc_v8f64(<8 x double> %x) {
+; CHECK-LABEL: trunc_v8f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetivli zero, 8, e64, m4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI14_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI14_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v12, v8
+; CHECK-NEXT: vmflt.vf v0, v12, fa5
+; CHECK-NEXT: vfcvt.rtz.x.f.v v12, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e64, m4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <8 x double> @llvm.experimental.constrained.trunc.v8f64(<8 x double> %x, metadata !"fpexcept.strict")
+ ret <8 x double> %a
+}
+declare <8 x double> @llvm.experimental.constrained.trunc.v8f64(<8 x double>, metadata)
diff --git a/llvm/test/CodeGen/RISCV/rvv/fnearbyint-constrained-sdnode.ll b/llvm/test/CodeGen/RISCV/rvv/fnearbyint-constrained-sdnode.ll
new file mode 100644
index 0000000..32d8f9d
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/rvv/fnearbyint-constrained-sdnode.ll
@@ -0,0 +1,350 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=ilp32d \
+; RUN: -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=lp64d \
+; RUN: -verify-machineinstrs < %s | FileCheck %s
+
+declare <vscale x 1 x half> @llvm.experimental.constrained.nearbyint.nxv1f16(<vscale x 1 x half>, metadata, metadata)
+
+define <vscale x 1 x half> @nearbyint_nxv1f16(<vscale x 1 x half> %v) {
+; CHECK-LABEL: nearbyint_nxv1f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI0_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI0_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: frflags a0
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: fsflags a0
+; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %r = call <vscale x 1 x half> @llvm.experimental.constrained.nearbyint.nxv1f16(<vscale x 1 x half> %v, metadata !"round.dynamic", metadata !"fpexcept.strict")
+ ret <vscale x 1 x half> %r
+}
+
+declare <vscale x 2 x half> @llvm.experimental.constrained.nearbyint.nxv2f16(<vscale x 2 x half>, metadata, metadata)
+
+define <vscale x 2 x half> @nearbyint_nxv2f16(<vscale x 2 x half> %v) {
+; CHECK-LABEL: nearbyint_nxv2f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI1_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI1_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: frflags a0
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: fsflags a0
+; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %r = call <vscale x 2 x half> @llvm.experimental.constrained.nearbyint.nxv2f16(<vscale x 2 x half> %v, metadata !"round.dynamic", metadata !"fpexcept.strict")
+ ret <vscale x 2 x half> %r
+}
+
+declare <vscale x 4 x half> @llvm.experimental.constrained.nearbyint.nxv4f16(<vscale x 4 x half>, metadata, metadata)
+
+define <vscale x 4 x half> @nearbyint_nxv4f16(<vscale x 4 x half> %v) {
+; CHECK-LABEL: nearbyint_nxv4f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI2_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI2_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: frflags a0
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: fsflags a0
+; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %r = call <vscale x 4 x half> @llvm.experimental.constrained.nearbyint.nxv4f16(<vscale x 4 x half> %v, metadata !"round.dynamic", metadata !"fpexcept.strict")
+ ret <vscale x 4 x half> %r
+}
+
+declare <vscale x 8 x half> @llvm.experimental.constrained.nearbyint.nxv8f16(<vscale x 8 x half>, metadata, metadata)
+
+define <vscale x 8 x half> @nearbyint_nxv8f16(<vscale x 8 x half> %v) {
+; CHECK-LABEL: nearbyint_nxv8f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI3_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI3_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v10, v8
+; CHECK-NEXT: vmflt.vf v0, v10, fa5
+; CHECK-NEXT: frflags a0
+; CHECK-NEXT: vfcvt.x.f.v v10, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t
+; CHECK-NEXT: fsflags a0
+; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t
+; CHECK-NEXT: ret
+ %r = call <vscale x 8 x half> @llvm.experimental.constrained.nearbyint.nxv8f16(<vscale x 8 x half> %v, metadata !"round.dynamic", metadata !"fpexcept.strict")
+ ret <vscale x 8 x half> %r
+}
+
+declare <vscale x 16 x half> @llvm.experimental.constrained.nearbyint.nxv16f16(<vscale x 16 x half>, metadata, metadata)
+
+define <vscale x 16 x half> @nearbyint_nxv16f16(<vscale x 16 x half> %v) {
+; CHECK-LABEL: nearbyint_nxv16f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI4_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI4_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v12, v8
+; CHECK-NEXT: vmflt.vf v0, v12, fa5
+; CHECK-NEXT: frflags a0
+; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
+; CHECK-NEXT: fsflags a0
+; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
+; CHECK-NEXT: ret
+ %r = call <vscale x 16 x half> @llvm.experimental.constrained.nearbyint.nxv16f16(<vscale x 16 x half> %v, metadata !"round.dynamic", metadata !"fpexcept.strict")
+ ret <vscale x 16 x half> %r
+}
+
+declare <vscale x 32 x half> @llvm.experimental.constrained.nearbyint.nxv32f16(<vscale x 32 x half>, metadata, metadata)
+
+define <vscale x 32 x half> @nearbyint_nxv32f16(<vscale x 32 x half> %v) {
+; CHECK-LABEL: nearbyint_nxv32f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e16, m8, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI5_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI5_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v16, v8
+; CHECK-NEXT: vmflt.vf v0, v16, fa5
+; CHECK-NEXT: frflags a0
+; CHECK-NEXT: vfcvt.x.f.v v16, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v16, v16, v0.t
+; CHECK-NEXT: fsflags a0
+; CHECK-NEXT: vsetvli zero, zero, e16, m8, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v16, v8, v0.t
+; CHECK-NEXT: ret
+ %r = call <vscale x 32 x half> @llvm.experimental.constrained.nearbyint.nxv32f16(<vscale x 32 x half> %v, metadata !"round.dynamic", metadata !"fpexcept.strict")
+ ret <vscale x 32 x half> %r
+}
+
+declare <vscale x 1 x float> @llvm.experimental.constrained.nearbyint.nxv1f32(<vscale x 1 x float>, metadata, metadata)
+
+define <vscale x 1 x float> @nearbyint_nxv1f32(<vscale x 1 x float> %v) {
+; CHECK-LABEL: nearbyint_nxv1f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: frflags a0
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: fsflags a0
+; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %r = call <vscale x 1 x float> @llvm.experimental.constrained.nearbyint.nxv1f32(<vscale x 1 x float> %v, metadata !"round.dynamic", metadata !"fpexcept.strict")
+ ret <vscale x 1 x float> %r
+}
+
+declare <vscale x 2 x float> @llvm.experimental.constrained.nearbyint.nxv2f32(<vscale x 2 x float>, metadata, metadata)
+
+define <vscale x 2 x float> @nearbyint_nxv2f32(<vscale x 2 x float> %v) {
+; CHECK-LABEL: nearbyint_nxv2f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: frflags a0
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: fsflags a0
+; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %r = call <vscale x 2 x float> @llvm.experimental.constrained.nearbyint.nxv2f32(<vscale x 2 x float> %v, metadata !"round.dynamic", metadata !"fpexcept.strict")
+ ret <vscale x 2 x float> %r
+}
+
+declare <vscale x 4 x float> @llvm.experimental.constrained.nearbyint.nxv4f32(<vscale x 4 x float>, metadata, metadata)
+
+define <vscale x 4 x float> @nearbyint_nxv4f32(<vscale x 4 x float> %v) {
+; CHECK-LABEL: nearbyint_nxv4f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v10, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v10, fa5
+; CHECK-NEXT: frflags a0
+; CHECK-NEXT: vfcvt.x.f.v v10, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t
+; CHECK-NEXT: fsflags a0
+; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t
+; CHECK-NEXT: ret
+ %r = call <vscale x 4 x float> @llvm.experimental.constrained.nearbyint.nxv4f32(<vscale x 4 x float> %v, metadata !"round.dynamic", metadata !"fpexcept.strict")
+ ret <vscale x 4 x float> %r
+}
+
+declare <vscale x 8 x float> @llvm.experimental.constrained.nearbyint.nxv8f32(<vscale x 8 x float>, metadata, metadata)
+
+define <vscale x 8 x float> @nearbyint_nxv8f32(<vscale x 8 x float> %v) {
+; CHECK-LABEL: nearbyint_nxv8f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v12, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v12, fa5
+; CHECK-NEXT: frflags a0
+; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
+; CHECK-NEXT: fsflags a0
+; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
+; CHECK-NEXT: ret
+ %r = call <vscale x 8 x float> @llvm.experimental.constrained.nearbyint.nxv8f32(<vscale x 8 x float> %v, metadata !"round.dynamic", metadata !"fpexcept.strict")
+ ret <vscale x 8 x float> %r
+}
+
+declare <vscale x 16 x float> @llvm.experimental.constrained.nearbyint.nxv16f32(<vscale x 16 x float>, metadata, metadata)
+
+define <vscale x 16 x float> @nearbyint_nxv16f32(<vscale x 16 x float> %v) {
+; CHECK-LABEL: nearbyint_nxv16f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v16, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v16, fa5
+; CHECK-NEXT: frflags a0
+; CHECK-NEXT: vfcvt.x.f.v v16, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v16, v16, v0.t
+; CHECK-NEXT: fsflags a0
+; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v16, v8, v0.t
+; CHECK-NEXT: ret
+ %r = call <vscale x 16 x float> @llvm.experimental.constrained.nearbyint.nxv16f32(<vscale x 16 x float> %v, metadata !"round.dynamic", metadata !"fpexcept.strict")
+ ret <vscale x 16 x float> %r
+}
+
+declare <vscale x 1 x double> @llvm.experimental.constrained.nearbyint.nxv1f64(<vscale x 1 x double>, metadata, metadata)
+
+define <vscale x 1 x double> @nearbyint_nxv1f64(<vscale x 1 x double> %v) {
+; CHECK-LABEL: nearbyint_nxv1f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI11_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI11_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: frflags a0
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: fsflags a0
+; CHECK-NEXT: vsetvli zero, zero, e64, m1, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %r = call <vscale x 1 x double> @llvm.experimental.constrained.nearbyint.nxv1f64(<vscale x 1 x double> %v, metadata !"round.dynamic", metadata !"fpexcept.strict")
+ ret <vscale x 1 x double> %r
+}
+
+declare <vscale x 2 x double> @llvm.experimental.constrained.nearbyint.nxv2f64(<vscale x 2 x double>, metadata, metadata)
+
+define <vscale x 2 x double> @nearbyint_nxv2f64(<vscale x 2 x double> %v) {
+; CHECK-LABEL: nearbyint_nxv2f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI12_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI12_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v10, v8
+; CHECK-NEXT: vmflt.vf v0, v10, fa5
+; CHECK-NEXT: frflags a0
+; CHECK-NEXT: vfcvt.x.f.v v10, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t
+; CHECK-NEXT: fsflags a0
+; CHECK-NEXT: vsetvli zero, zero, e64, m2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t
+; CHECK-NEXT: ret
+ %r = call <vscale x 2 x double> @llvm.experimental.constrained.nearbyint.nxv2f64(<vscale x 2 x double> %v, metadata !"round.dynamic", metadata !"fpexcept.strict")
+ ret <vscale x 2 x double> %r
+}
+
+declare <vscale x 4 x double> @llvm.experimental.constrained.nearbyint.nxv4f64(<vscale x 4 x double>, metadata, metadata)
+
+define <vscale x 4 x double> @nearbyint_nxv4f64(<vscale x 4 x double> %v) {
+; CHECK-LABEL: nearbyint_nxv4f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI13_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI13_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v12, v8
+; CHECK-NEXT: vmflt.vf v0, v12, fa5
+; CHECK-NEXT: frflags a0
+; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
+; CHECK-NEXT: fsflags a0
+; CHECK-NEXT: vsetvli zero, zero, e64, m4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
+; CHECK-NEXT: ret
+ %r = call <vscale x 4 x double> @llvm.experimental.constrained.nearbyint.nxv4f64(<vscale x 4 x double> %v, metadata !"round.dynamic", metadata !"fpexcept.strict")
+ ret <vscale x 4 x double> %r
+}
+
+declare <vscale x 8 x double> @llvm.experimental.constrained.nearbyint.nxv8f64(<vscale x 8 x double>, metadata, metadata)
+
+define <vscale x 8 x double> @nearbyint_nxv8f64(<vscale x 8 x double> %v) {
+; CHECK-LABEL: nearbyint_nxv8f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI14_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI14_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v16, v8
+; CHECK-NEXT: vmflt.vf v0, v16, fa5
+; CHECK-NEXT: frflags a0
+; CHECK-NEXT: vfcvt.x.f.v v16, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v16, v16, v0.t
+; CHECK-NEXT: fsflags a0
+; CHECK-NEXT: vsetvli zero, zero, e64, m8, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v16, v8, v0.t
+; CHECK-NEXT: ret
+ %r = call <vscale x 8 x double> @llvm.experimental.constrained.nearbyint.nxv8f64(<vscale x 8 x double> %v, metadata !"round.dynamic", metadata !"fpexcept.strict")
+ ret <vscale x 8 x double> %r
+}
diff --git a/llvm/test/CodeGen/RISCV/rvv/fround-costrained-sdnode.ll b/llvm/test/CodeGen/RISCV/rvv/fround-costrained-sdnode.ll
new file mode 100644
index 0000000..543f7b3
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/rvv/fround-costrained-sdnode.ll
@@ -0,0 +1,337 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=ilp32d \
+; RUN: -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=lp64d \
+; RUN: -verify-machineinstrs < %s | FileCheck %s
+
+; This file tests the code generation for `llvm.experimental.constrained.round.*` on scalable vector type.
+
+define <vscale x 1 x half> @round_nxv1f16(<vscale x 1 x half> %x) {
+; CHECK-LABEL: round_nxv1f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI0_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI0_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 4
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 1 x half> @llvm.experimental.constrained.round.nxv1f16(<vscale x 1 x half> %x, metadata !"fpexcept.strict")
+ ret <vscale x 1 x half> %a
+}
+declare <vscale x 1 x half> @llvm.experimental.constrained.round.nxv1f16(<vscale x 1 x half>, metadata)
+
+define <vscale x 2 x half> @round_nxv2f16(<vscale x 2 x half> %x) {
+; CHECK-LABEL: round_nxv2f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI1_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI1_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 4
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 2 x half> @llvm.experimental.constrained.round.nxv2f16(<vscale x 2 x half> %x, metadata !"fpexcept.strict")
+ ret <vscale x 2 x half> %a
+}
+declare <vscale x 2 x half> @llvm.experimental.constrained.round.nxv2f16(<vscale x 2 x half>, metadata)
+
+define <vscale x 4 x half> @round_nxv4f16(<vscale x 4 x half> %x) {
+; CHECK-LABEL: round_nxv4f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI2_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI2_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 4
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 4 x half> @llvm.experimental.constrained.round.nxv4f16(<vscale x 4 x half> %x, metadata !"fpexcept.strict")
+ ret <vscale x 4 x half> %a
+}
+declare <vscale x 4 x half> @llvm.experimental.constrained.round.nxv4f16(<vscale x 4 x half>, metadata)
+
+define <vscale x 8 x half> @round_nxv8f16(<vscale x 8 x half> %x) {
+; CHECK-LABEL: round_nxv8f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI3_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI3_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v10, v8
+; CHECK-NEXT: vmflt.vf v0, v10, fa5
+; CHECK-NEXT: fsrmi a0, 4
+; CHECK-NEXT: vfcvt.x.f.v v10, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 8 x half> @llvm.experimental.constrained.round.nxv8f16(<vscale x 8 x half> %x, metadata !"fpexcept.strict")
+ ret <vscale x 8 x half> %a
+}
+declare <vscale x 8 x half> @llvm.experimental.constrained.round.nxv8f16(<vscale x 8 x half>, metadata)
+
+define <vscale x 16 x half> @round_nxv16f16(<vscale x 16 x half> %x) {
+; CHECK-LABEL: round_nxv16f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI4_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI4_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v12, v8
+; CHECK-NEXT: vmflt.vf v0, v12, fa5
+; CHECK-NEXT: fsrmi a0, 4
+; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 16 x half> @llvm.experimental.constrained.round.nxv16f16(<vscale x 16 x half> %x, metadata !"fpexcept.strict")
+ ret <vscale x 16 x half> %a
+}
+declare <vscale x 16 x half> @llvm.experimental.constrained.round.nxv16f16(<vscale x 16 x half>, metadata)
+
+define <vscale x 32 x half> @round_nxv32f16(<vscale x 32 x half> %x) {
+; CHECK-LABEL: round_nxv32f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e16, m8, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI5_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI5_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v16, v8
+; CHECK-NEXT: vmflt.vf v0, v16, fa5
+; CHECK-NEXT: fsrmi a0, 4
+; CHECK-NEXT: vfcvt.x.f.v v16, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v16, v16, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, m8, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v16, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 32 x half> @llvm.experimental.constrained.round.nxv32f16(<vscale x 32 x half> %x, metadata !"fpexcept.strict")
+ ret <vscale x 32 x half> %a
+}
+declare <vscale x 32 x half> @llvm.experimental.constrained.round.nxv32f16(<vscale x 32 x half>, metadata)
+
+define <vscale x 1 x float> @round_nxv1f32(<vscale x 1 x float> %x) {
+; CHECK-LABEL: round_nxv1f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 4
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 1 x float> @llvm.experimental.constrained.round.nxv1f32(<vscale x 1 x float> %x, metadata !"fpexcept.strict")
+ ret <vscale x 1 x float> %a
+}
+declare <vscale x 1 x float> @llvm.experimental.constrained.round.nxv1f32(<vscale x 1 x float>, metadata)
+
+define <vscale x 2 x float> @round_nxv2f32(<vscale x 2 x float> %x) {
+; CHECK-LABEL: round_nxv2f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 4
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 2 x float> @llvm.experimental.constrained.round.nxv2f32(<vscale x 2 x float> %x, metadata !"fpexcept.strict")
+ ret <vscale x 2 x float> %a
+}
+declare <vscale x 2 x float> @llvm.experimental.constrained.round.nxv2f32(<vscale x 2 x float>, metadata)
+
+define <vscale x 4 x float> @round_nxv4f32(<vscale x 4 x float> %x) {
+; CHECK-LABEL: round_nxv4f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v10, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v10, fa5
+; CHECK-NEXT: fsrmi a0, 4
+; CHECK-NEXT: vfcvt.x.f.v v10, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 4 x float> @llvm.experimental.constrained.round.nxv4f32(<vscale x 4 x float> %x, metadata !"fpexcept.strict")
+ ret <vscale x 4 x float> %a
+}
+declare <vscale x 4 x float> @llvm.experimental.constrained.round.nxv4f32(<vscale x 4 x float>, metadata)
+
+define <vscale x 8 x float> @round_nxv8f32(<vscale x 8 x float> %x) {
+; CHECK-LABEL: round_nxv8f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v12, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v12, fa5
+; CHECK-NEXT: fsrmi a0, 4
+; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 8 x float> @llvm.experimental.constrained.round.nxv8f32(<vscale x 8 x float> %x, metadata !"fpexcept.strict")
+ ret <vscale x 8 x float> %a
+}
+declare <vscale x 8 x float> @llvm.experimental.constrained.round.nxv8f32(<vscale x 8 x float>, metadata)
+
+define <vscale x 16 x float> @round_nxv16f32(<vscale x 16 x float> %x) {
+; CHECK-LABEL: round_nxv16f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v16, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v16, fa5
+; CHECK-NEXT: fsrmi a0, 4
+; CHECK-NEXT: vfcvt.x.f.v v16, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v16, v16, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v16, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 16 x float> @llvm.experimental.constrained.round.nxv16f32(<vscale x 16 x float> %x, metadata !"fpexcept.strict")
+ ret <vscale x 16 x float> %a
+}
+declare <vscale x 16 x float> @llvm.experimental.constrained.round.nxv16f32(<vscale x 16 x float>, metadata)
+
+define <vscale x 1 x double> @round_nxv1f64(<vscale x 1 x double> %x) {
+; CHECK-LABEL: round_nxv1f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI11_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI11_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 4
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e64, m1, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 1 x double> @llvm.experimental.constrained.round.nxv1f64(<vscale x 1 x double> %x, metadata !"fpexcept.strict")
+ ret <vscale x 1 x double> %a
+}
+declare <vscale x 1 x double> @llvm.experimental.constrained.round.nxv1f64(<vscale x 1 x double>, metadata)
+
+define <vscale x 2 x double> @round_nxv2f64(<vscale x 2 x double> %x) {
+; CHECK-LABEL: round_nxv2f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI12_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI12_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v10, v8
+; CHECK-NEXT: vmflt.vf v0, v10, fa5
+; CHECK-NEXT: fsrmi a0, 4
+; CHECK-NEXT: vfcvt.x.f.v v10, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e64, m2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 2 x double> @llvm.experimental.constrained.round.nxv2f64(<vscale x 2 x double> %x, metadata !"fpexcept.strict")
+ ret <vscale x 2 x double> %a
+}
+declare <vscale x 2 x double> @llvm.experimental.constrained.round.nxv2f64(<vscale x 2 x double>, metadata)
+
+define <vscale x 4 x double> @round_nxv4f64(<vscale x 4 x double> %x) {
+; CHECK-LABEL: round_nxv4f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI13_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI13_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v12, v8
+; CHECK-NEXT: vmflt.vf v0, v12, fa5
+; CHECK-NEXT: fsrmi a0, 4
+; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e64, m4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 4 x double> @llvm.experimental.constrained.round.nxv4f64(<vscale x 4 x double> %x, metadata !"fpexcept.strict")
+ ret <vscale x 4 x double> %a
+}
+declare <vscale x 4 x double> @llvm.experimental.constrained.round.nxv4f64(<vscale x 4 x double>, metadata)
+
+define <vscale x 8 x double> @round_nxv8f64(<vscale x 8 x double> %x) {
+; CHECK-LABEL: round_nxv8f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI14_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI14_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v16, v8
+; CHECK-NEXT: vmflt.vf v0, v16, fa5
+; CHECK-NEXT: fsrmi a0, 4
+; CHECK-NEXT: vfcvt.x.f.v v16, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v16, v16, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e64, m8, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v16, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 8 x double> @llvm.experimental.constrained.round.nxv8f64(<vscale x 8 x double> %x, metadata !"fpexcept.strict")
+ ret <vscale x 8 x double> %a
+}
+declare <vscale x 8 x double> @llvm.experimental.constrained.round.nxv8f64(<vscale x 8 x double>, metadata)
diff --git a/llvm/test/CodeGen/RISCV/rvv/froundeven-constrained-sdnode.ll b/llvm/test/CodeGen/RISCV/rvv/froundeven-constrained-sdnode.ll
new file mode 100644
index 0000000..58918d1
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/rvv/froundeven-constrained-sdnode.ll
@@ -0,0 +1,337 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=ilp32d \
+; RUN: -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=lp64d \
+; RUN: -verify-machineinstrs < %s | FileCheck %s
+
+; This file tests the code generation for `llvm.experimental.constrained.roundeven.*` on scalable vector type.
+
+define <vscale x 1 x half> @roundeven_nxv1f16(<vscale x 1 x half> %x) {
+; CHECK-LABEL: roundeven_nxv1f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI0_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI0_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 0
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 1 x half> @llvm.experimental.constrained.roundeven.nxv1f16(<vscale x 1 x half> %x, metadata !"fpexcept.strict")
+ ret <vscale x 1 x half> %a
+}
+declare <vscale x 1 x half> @llvm.experimental.constrained.roundeven.nxv1f16(<vscale x 1 x half>, metadata)
+
+define <vscale x 2 x half> @roundeven_nxv2f16(<vscale x 2 x half> %x) {
+; CHECK-LABEL: roundeven_nxv2f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI1_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI1_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 0
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 2 x half> @llvm.experimental.constrained.roundeven.nxv2f16(<vscale x 2 x half> %x, metadata !"fpexcept.strict")
+ ret <vscale x 2 x half> %a
+}
+declare <vscale x 2 x half> @llvm.experimental.constrained.roundeven.nxv2f16(<vscale x 2 x half>, metadata)
+
+define <vscale x 4 x half> @roundeven_nxv4f16(<vscale x 4 x half> %x) {
+; CHECK-LABEL: roundeven_nxv4f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI2_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI2_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 0
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 4 x half> @llvm.experimental.constrained.roundeven.nxv4f16(<vscale x 4 x half> %x, metadata !"fpexcept.strict")
+ ret <vscale x 4 x half> %a
+}
+declare <vscale x 4 x half> @llvm.experimental.constrained.roundeven.nxv4f16(<vscale x 4 x half>, metadata)
+
+define <vscale x 8 x half> @roundeven_nxv8f16(<vscale x 8 x half> %x) {
+; CHECK-LABEL: roundeven_nxv8f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI3_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI3_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v10, v8
+; CHECK-NEXT: vmflt.vf v0, v10, fa5
+; CHECK-NEXT: fsrmi a0, 0
+; CHECK-NEXT: vfcvt.x.f.v v10, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 8 x half> @llvm.experimental.constrained.roundeven.nxv8f16(<vscale x 8 x half> %x, metadata !"fpexcept.strict")
+ ret <vscale x 8 x half> %a
+}
+declare <vscale x 8 x half> @llvm.experimental.constrained.roundeven.nxv8f16(<vscale x 8 x half>, metadata)
+
+define <vscale x 16 x half> @roundeven_nxv16f16(<vscale x 16 x half> %x) {
+; CHECK-LABEL: roundeven_nxv16f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI4_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI4_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v12, v8
+; CHECK-NEXT: vmflt.vf v0, v12, fa5
+; CHECK-NEXT: fsrmi a0, 0
+; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 16 x half> @llvm.experimental.constrained.roundeven.nxv16f16(<vscale x 16 x half> %x, metadata !"fpexcept.strict")
+ ret <vscale x 16 x half> %a
+}
+declare <vscale x 16 x half> @llvm.experimental.constrained.roundeven.nxv16f16(<vscale x 16 x half>, metadata)
+
+define <vscale x 32 x half> @roundeven_nxv32f16(<vscale x 32 x half> %x) {
+; CHECK-LABEL: roundeven_nxv32f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e16, m8, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI5_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI5_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v16, v8
+; CHECK-NEXT: vmflt.vf v0, v16, fa5
+; CHECK-NEXT: fsrmi a0, 0
+; CHECK-NEXT: vfcvt.x.f.v v16, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v16, v16, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, m8, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v16, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 32 x half> @llvm.experimental.constrained.roundeven.nxv32f16(<vscale x 32 x half> %x, metadata !"fpexcept.strict")
+ ret <vscale x 32 x half> %a
+}
+declare <vscale x 32 x half> @llvm.experimental.constrained.roundeven.nxv32f16(<vscale x 32 x half>, metadata)
+
+define <vscale x 1 x float> @roundeven_nxv1f32(<vscale x 1 x float> %x) {
+; CHECK-LABEL: roundeven_nxv1f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 0
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 1 x float> @llvm.experimental.constrained.roundeven.nxv1f32(<vscale x 1 x float> %x, metadata !"fpexcept.strict")
+ ret <vscale x 1 x float> %a
+}
+declare <vscale x 1 x float> @llvm.experimental.constrained.roundeven.nxv1f32(<vscale x 1 x float>, metadata)
+
+define <vscale x 2 x float> @roundeven_nxv2f32(<vscale x 2 x float> %x) {
+; CHECK-LABEL: roundeven_nxv2f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 0
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 2 x float> @llvm.experimental.constrained.roundeven.nxv2f32(<vscale x 2 x float> %x, metadata !"fpexcept.strict")
+ ret <vscale x 2 x float> %a
+}
+declare <vscale x 2 x float> @llvm.experimental.constrained.roundeven.nxv2f32(<vscale x 2 x float>, metadata)
+
+define <vscale x 4 x float> @roundeven_nxv4f32(<vscale x 4 x float> %x) {
+; CHECK-LABEL: roundeven_nxv4f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v10, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v10, fa5
+; CHECK-NEXT: fsrmi a0, 0
+; CHECK-NEXT: vfcvt.x.f.v v10, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 4 x float> @llvm.experimental.constrained.roundeven.nxv4f32(<vscale x 4 x float> %x, metadata !"fpexcept.strict")
+ ret <vscale x 4 x float> %a
+}
+declare <vscale x 4 x float> @llvm.experimental.constrained.roundeven.nxv4f32(<vscale x 4 x float>, metadata)
+
+define <vscale x 8 x float> @roundeven_nxv8f32(<vscale x 8 x float> %x) {
+; CHECK-LABEL: roundeven_nxv8f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v12, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v12, fa5
+; CHECK-NEXT: fsrmi a0, 0
+; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 8 x float> @llvm.experimental.constrained.roundeven.nxv8f32(<vscale x 8 x float> %x, metadata !"fpexcept.strict")
+ ret <vscale x 8 x float> %a
+}
+declare <vscale x 8 x float> @llvm.experimental.constrained.roundeven.nxv8f32(<vscale x 8 x float>, metadata)
+
+define <vscale x 16 x float> @roundeven_nxv16f32(<vscale x 16 x float> %x) {
+; CHECK-LABEL: roundeven_nxv16f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v16, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v16, fa5
+; CHECK-NEXT: fsrmi a0, 0
+; CHECK-NEXT: vfcvt.x.f.v v16, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v16, v16, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v16, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 16 x float> @llvm.experimental.constrained.roundeven.nxv16f32(<vscale x 16 x float> %x, metadata !"fpexcept.strict")
+ ret <vscale x 16 x float> %a
+}
+declare <vscale x 16 x float> @llvm.experimental.constrained.roundeven.nxv16f32(<vscale x 16 x float>, metadata)
+
+define <vscale x 1 x double> @roundeven_nxv1f64(<vscale x 1 x double> %x) {
+; CHECK-LABEL: roundeven_nxv1f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI11_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI11_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: fsrmi a0, 0
+; CHECK-NEXT: vfcvt.x.f.v v9, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e64, m1, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 1 x double> @llvm.experimental.constrained.roundeven.nxv1f64(<vscale x 1 x double> %x, metadata !"fpexcept.strict")
+ ret <vscale x 1 x double> %a
+}
+declare <vscale x 1 x double> @llvm.experimental.constrained.roundeven.nxv1f64(<vscale x 1 x double>, metadata)
+
+define <vscale x 2 x double> @roundeven_nxv2f64(<vscale x 2 x double> %x) {
+; CHECK-LABEL: roundeven_nxv2f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI12_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI12_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v10, v8
+; CHECK-NEXT: vmflt.vf v0, v10, fa5
+; CHECK-NEXT: fsrmi a0, 0
+; CHECK-NEXT: vfcvt.x.f.v v10, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e64, m2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 2 x double> @llvm.experimental.constrained.roundeven.nxv2f64(<vscale x 2 x double> %x, metadata !"fpexcept.strict")
+ ret <vscale x 2 x double> %a
+}
+declare <vscale x 2 x double> @llvm.experimental.constrained.roundeven.nxv2f64(<vscale x 2 x double>, metadata)
+
+define <vscale x 4 x double> @roundeven_nxv4f64(<vscale x 4 x double> %x) {
+; CHECK-LABEL: roundeven_nxv4f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI13_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI13_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v12, v8
+; CHECK-NEXT: vmflt.vf v0, v12, fa5
+; CHECK-NEXT: fsrmi a0, 0
+; CHECK-NEXT: vfcvt.x.f.v v12, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e64, m4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 4 x double> @llvm.experimental.constrained.roundeven.nxv4f64(<vscale x 4 x double> %x, metadata !"fpexcept.strict")
+ ret <vscale x 4 x double> %a
+}
+declare <vscale x 4 x double> @llvm.experimental.constrained.roundeven.nxv4f64(<vscale x 4 x double>, metadata)
+
+define <vscale x 8 x double> @roundeven_nxv8f64(<vscale x 8 x double> %x) {
+; CHECK-LABEL: roundeven_nxv8f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI14_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI14_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v16, v8
+; CHECK-NEXT: vmflt.vf v0, v16, fa5
+; CHECK-NEXT: fsrmi a0, 0
+; CHECK-NEXT: vfcvt.x.f.v v16, v8, v0.t
+; CHECK-NEXT: fsrm a0
+; CHECK-NEXT: vfcvt.f.x.v v16, v16, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e64, m8, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v16, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 8 x double> @llvm.experimental.constrained.roundeven.nxv8f64(<vscale x 8 x double> %x, metadata !"fpexcept.strict")
+ ret <vscale x 8 x double> %a
+}
+declare <vscale x 8 x double> @llvm.experimental.constrained.roundeven.nxv8f64(<vscale x 8 x double>, metadata)
diff --git a/llvm/test/CodeGen/RISCV/rvv/ftrunc-constrained-sdnode.ll b/llvm/test/CodeGen/RISCV/rvv/ftrunc-constrained-sdnode.ll
new file mode 100644
index 0000000..553c66a
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/rvv/ftrunc-constrained-sdnode.ll
@@ -0,0 +1,305 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=ilp32d \
+; RUN: -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=lp64d \
+; RUN: -verify-machineinstrs < %s | FileCheck %s
+
+define <vscale x 1 x half> @trunc_nxv1f16(<vscale x 1 x half> %x) {
+; CHECK-LABEL: trunc_nxv1f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e16, mf4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI0_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI0_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: vfcvt.rtz.x.f.v v9, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, mf4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 1 x half> @llvm.experimental.constrained.trunc.nxv1f16(<vscale x 1 x half> %x, metadata !"fpexcept.strict")
+ ret <vscale x 1 x half> %a
+}
+declare <vscale x 1 x half> @llvm.experimental.constrained.trunc.nxv1f16(<vscale x 1 x half>, metadata)
+
+define <vscale x 2 x half> @trunc_nxv2f16(<vscale x 2 x half> %x) {
+; CHECK-LABEL: trunc_nxv2f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI1_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI1_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: vfcvt.rtz.x.f.v v9, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 2 x half> @llvm.experimental.constrained.trunc.nxv2f16(<vscale x 2 x half> %x, metadata !"fpexcept.strict")
+ ret <vscale x 2 x half> %a
+}
+declare <vscale x 2 x half> @llvm.experimental.constrained.trunc.nxv2f16(<vscale x 2 x half>, metadata)
+
+define <vscale x 4 x half> @trunc_nxv4f16(<vscale x 4 x half> %x) {
+; CHECK-LABEL: trunc_nxv4f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e16, m1, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI2_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI2_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: vfcvt.rtz.x.f.v v9, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 4 x half> @llvm.experimental.constrained.trunc.nxv4f16(<vscale x 4 x half> %x, metadata !"fpexcept.strict")
+ ret <vscale x 4 x half> %a
+}
+declare <vscale x 4 x half> @llvm.experimental.constrained.trunc.nxv4f16(<vscale x 4 x half>, metadata)
+
+define <vscale x 8 x half> @trunc_nxv8f16(<vscale x 8 x half> %x) {
+; CHECK-LABEL: trunc_nxv8f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e16, m2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI3_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI3_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v10, v8
+; CHECK-NEXT: vmflt.vf v0, v10, fa5
+; CHECK-NEXT: vfcvt.rtz.x.f.v v10, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, m2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 8 x half> @llvm.experimental.constrained.trunc.nxv8f16(<vscale x 8 x half> %x, metadata !"fpexcept.strict")
+ ret <vscale x 8 x half> %a
+}
+declare <vscale x 8 x half> @llvm.experimental.constrained.trunc.nxv8f16(<vscale x 8 x half>, metadata)
+
+define <vscale x 16 x half> @trunc_nxv16f16(<vscale x 16 x half> %x) {
+; CHECK-LABEL: trunc_nxv16f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e16, m4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI4_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI4_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v12, v8
+; CHECK-NEXT: vmflt.vf v0, v12, fa5
+; CHECK-NEXT: vfcvt.rtz.x.f.v v12, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, m4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 16 x half> @llvm.experimental.constrained.trunc.nxv16f16(<vscale x 16 x half> %x, metadata !"fpexcept.strict")
+ ret <vscale x 16 x half> %a
+}
+declare <vscale x 16 x half> @llvm.experimental.constrained.trunc.nxv16f16(<vscale x 16 x half>, metadata)
+
+define <vscale x 32 x half> @trunc_nxv32f16(<vscale x 32 x half> %x) {
+; CHECK-LABEL: trunc_nxv32f16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e16, m8, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI5_0)
+; CHECK-NEXT: flh fa5, %lo(.LCPI5_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v16, v8
+; CHECK-NEXT: vmflt.vf v0, v16, fa5
+; CHECK-NEXT: vfcvt.rtz.x.f.v v16, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v16, v16, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e16, m8, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v16, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 32 x half> @llvm.experimental.constrained.trunc.nxv32f16(<vscale x 32 x half> %x, metadata !"fpexcept.strict")
+ ret <vscale x 32 x half> %a
+}
+declare <vscale x 32 x half> @llvm.experimental.constrained.trunc.nxv32f16(<vscale x 32 x half>, metadata)
+
+define <vscale x 1 x float> @trunc_nxv1f32(<vscale x 1 x float> %x) {
+; CHECK-LABEL: trunc_nxv1f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: vfcvt.rtz.x.f.v v9, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 1 x float> @llvm.experimental.constrained.trunc.nxv1f32(<vscale x 1 x float> %x, metadata !"fpexcept.strict")
+ ret <vscale x 1 x float> %a
+}
+declare <vscale x 1 x float> @llvm.experimental.constrained.trunc.nxv1f32(<vscale x 1 x float>, metadata)
+
+define <vscale x 2 x float> @trunc_nxv2f32(<vscale x 2 x float> %x) {
+; CHECK-LABEL: trunc_nxv2f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: vfcvt.rtz.x.f.v v9, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 2 x float> @llvm.experimental.constrained.trunc.nxv2f32(<vscale x 2 x float> %x, metadata !"fpexcept.strict")
+ ret <vscale x 2 x float> %a
+}
+declare <vscale x 2 x float> @llvm.experimental.constrained.trunc.nxv2f32(<vscale x 2 x float>, metadata)
+
+define <vscale x 4 x float> @trunc_nxv4f32(<vscale x 4 x float> %x) {
+; CHECK-LABEL: trunc_nxv4f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v10, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v10, fa5
+; CHECK-NEXT: vfcvt.rtz.x.f.v v10, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 4 x float> @llvm.experimental.constrained.trunc.nxv4f32(<vscale x 4 x float> %x, metadata !"fpexcept.strict")
+ ret <vscale x 4 x float> %a
+}
+declare <vscale x 4 x float> @llvm.experimental.constrained.trunc.nxv4f32(<vscale x 4 x float>, metadata)
+
+define <vscale x 8 x float> @trunc_nxv8f32(<vscale x 8 x float> %x) {
+; CHECK-LABEL: trunc_nxv8f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v12, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v12, fa5
+; CHECK-NEXT: vfcvt.rtz.x.f.v v12, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, m4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 8 x float> @llvm.experimental.constrained.trunc.nxv8f32(<vscale x 8 x float> %x, metadata !"fpexcept.strict")
+ ret <vscale x 8 x float> %a
+}
+declare <vscale x 8 x float> @llvm.experimental.constrained.trunc.nxv8f32(<vscale x 8 x float>, metadata)
+
+define <vscale x 16 x float> @trunc_nxv16f32(<vscale x 16 x float> %x) {
+; CHECK-LABEL: trunc_nxv16f32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e32, m8, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v16, v8
+; CHECK-NEXT: lui a0, 307200
+; CHECK-NEXT: fmv.w.x fa5, a0
+; CHECK-NEXT: vmflt.vf v0, v16, fa5
+; CHECK-NEXT: vfcvt.rtz.x.f.v v16, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v16, v16, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e32, m8, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v16, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 16 x float> @llvm.experimental.constrained.trunc.nxv16f32(<vscale x 16 x float> %x, metadata !"fpexcept.strict")
+ ret <vscale x 16 x float> %a
+}
+declare <vscale x 16 x float> @llvm.experimental.constrained.trunc.nxv16f32(<vscale x 16 x float>, metadata)
+
+define <vscale x 1 x double> @trunc_nxv1f64(<vscale x 1 x double> %x) {
+; CHECK-LABEL: trunc_nxv1f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI11_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI11_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v9, v8
+; CHECK-NEXT: vmflt.vf v0, v9, fa5
+; CHECK-NEXT: vfcvt.rtz.x.f.v v9, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v9, v9, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e64, m1, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v9, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 1 x double> @llvm.experimental.constrained.trunc.nxv1f64(<vscale x 1 x double> %x, metadata !"fpexcept.strict")
+ ret <vscale x 1 x double> %a
+}
+declare <vscale x 1 x double> @llvm.experimental.constrained.trunc.nxv1f64(<vscale x 1 x double>, metadata)
+
+define <vscale x 2 x double> @trunc_nxv2f64(<vscale x 2 x double> %x) {
+; CHECK-LABEL: trunc_nxv2f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e64, m2, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI12_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI12_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v10, v8
+; CHECK-NEXT: vmflt.vf v0, v10, fa5
+; CHECK-NEXT: vfcvt.rtz.x.f.v v10, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v10, v10, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e64, m2, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v10, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 2 x double> @llvm.experimental.constrained.trunc.nxv2f64(<vscale x 2 x double> %x, metadata !"fpexcept.strict")
+ ret <vscale x 2 x double> %a
+}
+declare <vscale x 2 x double> @llvm.experimental.constrained.trunc.nxv2f64(<vscale x 2 x double>, metadata)
+
+define <vscale x 4 x double> @trunc_nxv4f64(<vscale x 4 x double> %x) {
+; CHECK-LABEL: trunc_nxv4f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI13_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI13_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v12, v8
+; CHECK-NEXT: vmflt.vf v0, v12, fa5
+; CHECK-NEXT: vfcvt.rtz.x.f.v v12, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v12, v12, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e64, m4, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v12, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 4 x double> @llvm.experimental.constrained.trunc.nxv4f64(<vscale x 4 x double> %x, metadata !"fpexcept.strict")
+ ret <vscale x 4 x double> %a
+}
+declare <vscale x 4 x double> @llvm.experimental.constrained.trunc.nxv4f64(<vscale x 4 x double>, metadata)
+
+define <vscale x 8 x double> @trunc_nxv8f64(<vscale x 8 x double> %x) {
+; CHECK-LABEL: trunc_nxv8f64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e64, m8, ta, ma
+; CHECK-NEXT: vmfne.vv v0, v8, v8
+; CHECK-NEXT: lui a0, %hi(.LCPI14_0)
+; CHECK-NEXT: fld fa5, %lo(.LCPI14_0)(a0)
+; CHECK-NEXT: vfadd.vv v8, v8, v8, v0.t
+; CHECK-NEXT: vfabs.v v16, v8
+; CHECK-NEXT: vmflt.vf v0, v16, fa5
+; CHECK-NEXT: vfcvt.rtz.x.f.v v16, v8, v0.t
+; CHECK-NEXT: vfcvt.f.x.v v16, v16, v0.t
+; CHECK-NEXT: vsetvli zero, zero, e64, m8, ta, mu
+; CHECK-NEXT: vfsgnj.vv v8, v16, v8, v0.t
+; CHECK-NEXT: ret
+ %a = call <vscale x 8 x double> @llvm.experimental.constrained.trunc.nxv8f64(<vscale x 8 x double> %x, metadata !"fpexcept.strict")
+ ret <vscale x 8 x double> %a
+}
+declare <vscale x 8 x double> @llvm.experimental.constrained.trunc.nxv8f64(<vscale x 8 x double>, metadata)
