| # RUN: not llvm-mc -triple=thumbv7 -mcpu=cortex-a8 -disassemble < %s 2> %t | FileCheck %s |
| # RUN: FileCheck --check-prefix=ERROR < %t %s |
| |
| [0x09,0xea,0x08,0x04] |
| # CHECK: and.w r4, r9, r8 |
| |
| [0x09,0xea,0x08,0x84] |
| # CHECK: and.w r4, r9, r8 |
| # ERROR: [[@LINE-2]]:2: warning: potentially undefined instruction encoding |
| |
| [0x04,0xea,0xe8,0x01] |
| # CHECK: and.w r1, r4, r8, asr #3 |
| |
| [0x04,0xea,0xe8,0x81] |
| # CHECK: and.w r1, r4, r8, asr #3 |
| # ERROR: [[@LINE-2]]:2: warning: potentially undefined instruction encoding |
| |
| [0x11,0xea,0x47,0x02] |
| # CHECK: ands.w r2, r1, r7, lsl #1 |
| |
| [0x11,0xea,0x47,0x82] |
| # CHECK: ands.w r2, r1, r7, lsl #1 |
| # ERROR: [[@LINE-2]]:2: warning: potentially undefined instruction encoding |
| |
| [0x45,0xea,0x06,0x04] |
| # CHECK: orr.w r4, r5, r6 |
| |
| [0x45,0xea,0x06,0x84] |
| # ERROR: [[@LINE-1]]:2: warning: invalid instruction encoding |
| |
| [0x45,0xea,0x46,0x14] |
| # CHECK: orr.w r4, r5, r6, lsl #5 |
| |
| [0x45,0xea,0x46,0x94] |
| # ERROR: [[@LINE-1]]:2: warning: invalid instruction encoding |
| |
| [0x55,0xea,0x56,0x14] |
| # CHECK: orrs.w r4, r5, r6, lsr #5 |
| |
| [0x55,0xea,0x56,0x94] |
| # ERROR: [[@LINE-1]]:2: warning: invalid instruction encoding |
| |
| [0x85,0xea,0x06,0x04] |
| # CHECK: eor.w r4, r5, r6 |
| |
| [0x85,0xea,0x06,0x84] |
| # CHECK: eor.w r4, r5, r6 |
| # ERROR: [[@LINE-2]]:2: warning: potentially undefined instruction encoding |
| |
| [0x85,0xea,0x46,0x14] |
| # CHECK: eor.w r4, r5, r6, lsl #5 |
| |
| [0x85,0xea,0x46,0x94] |
| # CHECK: eor.w r4, r5, r6, lsl #5 |
| # ERROR: [[@LINE-2]]:2: warning: potentially undefined instruction encoding |
| |
| [0x4f,0xea,0x02,0x01] |
| # CHECK: mov.w r1, r2 |
| |
| [0x4f,0xea,0x02,0x81] |
| # ERROR: [[@LINE-1]]:2: warning: invalid instruction encoding |
| |
| [0x4f,0xea,0x02,0x46] |
| # CHECK: lsl.w r6, r2, #16 |
| |
| [0x4f,0xea,0x02,0xc6] |
| # ERROR: [[@LINE-1]]:2: warning: invalid instruction encoding |
| |
| [0x4f,0xea,0x12,0x46] |
| # CHECK: lsr.w r6, r2, #16 |
| |
| [0x4f,0xea,0x12,0xc6] |
| # ERROR: [[@LINE-1]]:2: warning: invalid instruction encoding |
| |
| [0x5f,0xea,0x22,0x06] |
| # CHECK: asrs.w r6, r2, #32 |
| |
| [0x5f,0xea,0x22,0x86] |
| # ERROR: [[@LINE-1]]:2: warning: invalid instruction encoding |
| |
| [0x5f,0xea,0x72,0x16] |
| # CHECK: rors.w r6, r2, #5 |
| |
| [0x5f,0xea,0x72,0x96] |
| # ERROR: [[@LINE-1]]:2: warning: invalid instruction encoding |
| |
| [0x4f,0xea,0x34,0x04] |
| # CHECK: rrx r4, r4 |
| |
| [0x4f,0xea,0x34,0x84] |
| # CHECK: rrx r4, r4 |
| # ERROR: [[@LINE-2]]:2: warning: potentially undefined instruction encoding |
