llvm/test/MC/Disassembler/ARM/armv8.6a-matmul-arm.txt

# RUN:     llvm-mc -triple=armv8 -mattr=+i8mm  -disassemble < %s      | FileCheck %s
# RUN: not llvm-mc -triple=armv8 -mattr=+v8.4a -disassemble < %s 2>&1 | FileCheck %s --check-prefix=NOMATMUL

[0x44,0x0c,0x22,0xfc]
# CHECK: vsmmla.s8 q0, q1, q2
# NOMATMUL: :[[@LINE-2]]:{{[0-9]+}}: warning: invalid instruction encoding

[0x54,0x0c,0x22,0xfc]
# CHECK: vummla.u8 q0, q1, q2
# NOMATMUL: :[[@LINE-2]]:{{[0-9]+}}: warning: invalid instruction encoding

[0x44,0x0c,0xa2,0xfc]
# CHECK: vusmmla.s8 q0, q1, q2
# NOMATMUL: :[[@LINE-2]]:{{[0-9]+}}: warning: invalid instruction encoding

[0x02,0x0d,0xa1,0xfc]
# CHECK: vusdot.s8 d0, d1, d2
# NOMATMUL: :[[@LINE-2]]:{{[0-9]+}}: warning: invalid instruction encoding

[0x44,0x0d,0xa2,0xfc]
# CHECK: vusdot.s8 q0, q1, q2
# NOMATMUL: :[[@LINE-2]]:{{[0-9]+}}: warning: invalid instruction encoding

[0x02,0x0d,0x81,0xfe]
# CHECK: vusdot.s8 d0, d1, d2[0]
# NOMATMUL: :[[@LINE-2]]:{{[0-9]+}}: warning: invalid instruction encoding

[0x32,0x0d,0x81,0xfe]
# CHECK: vsudot.u8 d0, d1, d2[1]
# NOMATMUL: :[[@LINE-2]]:{{[0-9]+}}: warning: invalid instruction encoding

[0x42,0x0d,0x82,0xfe]
# CHECK: vusdot.s8 q0, q1, d2[0]
# NOMATMUL: :[[@LINE-2]]:{{[0-9]+}}: warning: invalid instruction encoding

[0x72,0x0d,0x82,0xfe]
# CHECK: vsudot.u8 q0, q1, d2[1]
# NOMATMUL: :[[@LINE-2]]:{{[0-9]+}}: warning: invalid instruction encoding