# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=x86_64-linux-gnu -global-isel -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s

--- |
  ; ModuleID = 'sitofp.ll'
  source_filename = "sitofp.c"
  target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
  target triple = "x86_64-unknown-linux-gnu"

  ; Function Attrs: norecurse nounwind readnone uwtable
  define dso_local float @int8_to_float(i8 signext %a) local_unnamed_addr #0 {
  entry:
    %conv = sitofp i8 %a to float
    ret float %conv
  }

  ; Function Attrs: norecurse nounwind readnone uwtable
  define dso_local float @int16_to_float(i16 signext %a) local_unnamed_addr #0 {
  entry:
    %conv = sitofp i16 %a to float
    ret float %conv
  }

  ; Function Attrs: norecurse nounwind readnone uwtable
  define dso_local float @int32_to_float(i32 %a) local_unnamed_addr #0 {
  entry:
    %conv = sitofp i32 %a to float
    ret float %conv
  }

  ; Function Attrs: norecurse nounwind readnone uwtable
  define dso_local float @int64_to_float(i64 %a) local_unnamed_addr #0 {
  entry:
    %conv = sitofp i64 %a to float
    ret float %conv
  }

  ; Function Attrs: norecurse nounwind readnone uwtable
  define dso_local double @int8_to_double(i8 signext %a) local_unnamed_addr #0 {
  entry:
    %conv = sitofp i8 %a to double
    ret double %conv
  }

  ; Function Attrs: norecurse nounwind readnone uwtable
  define dso_local double @int16_to_double(i16 signext %a) local_unnamed_addr #0 {
  entry:
    %conv = sitofp i16 %a to double
    ret double %conv
  }

  ; Function Attrs: norecurse nounwind readnone uwtable
  define dso_local double @int32_to_double(i32 %a) local_unnamed_addr #0 {
  entry:
    %conv = sitofp i32 %a to double
    ret double %conv
  }

  ; Function Attrs: norecurse nounwind readnone uwtable
  define dso_local double @int64_to_double(i64 %a) local_unnamed_addr #0 {
  entry:
    %conv = sitofp i64 %a to double
    ret double %conv
  }

  attributes #0 = { norecurse nounwind readnone uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }

  !llvm.module.flags = !{!0}
  !llvm.ident = !{!1}

  !0 = !{i32 1, !"wchar_size", i32 4}
  !1 = !{!"clang version 7.0.0"}

...
---
name:            int8_to_float
alignment:       16
tracksRegLiveness: true
registers:
  - { id: 0, class: _ }
  - { id: 1, class: _ }
  - { id: 2, class: _ }
  - { id: 3, class: _ }
body:             |
  bb.1.entry:
    liveins: $edi

    ; CHECK-LABEL: name: int8_to_float
    ; CHECK: liveins: $edi
    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
    ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
    ; CHECK: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 24
    ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C]](s8)
    ; CHECK: [[COPY2:%[0-9]+]]:_(s8) = COPY [[C]](s8)
    ; CHECK: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[COPY2]](s8)
    ; CHECK: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[ASHR]](s32)
    ; CHECK: [[ANYEXT:%[0-9]+]]:_(s128) = G_ANYEXT [[SITOFP]](s32)
    ; CHECK: $xmm0 = COPY [[ANYEXT]](s128)
    ; CHECK: RET 0, implicit $xmm0
    %1:_(s32) = COPY $edi
    %0:_(s8) = G_TRUNC %1(s32)
    %2:_(s32) = G_SITOFP %0(s8)
    %3:_(s128) = G_ANYEXT %2(s32)
    $xmm0 = COPY %3(s128)
    RET 0, implicit $xmm0

...
---
name:            int16_to_float
alignment:       16
tracksRegLiveness: true
registers:
  - { id: 0, class: _ }
  - { id: 1, class: _ }
  - { id: 2, class: _ }
  - { id: 3, class: _ }
body:             |
  bb.1.entry:
    liveins: $edi

    ; CHECK-LABEL: name: int16_to_float
    ; CHECK: liveins: $edi
    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
    ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
    ; CHECK: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 16
    ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C]](s8)
    ; CHECK: [[COPY2:%[0-9]+]]:_(s8) = COPY [[C]](s8)
    ; CHECK: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[COPY2]](s8)
    ; CHECK: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[ASHR]](s32)
    ; CHECK: [[ANYEXT:%[0-9]+]]:_(s128) = G_ANYEXT [[SITOFP]](s32)
    ; CHECK: $xmm0 = COPY [[ANYEXT]](s128)
    ; CHECK: RET 0, implicit $xmm0
    %1:_(s32) = COPY $edi
    %0:_(s16) = G_TRUNC %1(s32)
    %2:_(s32) = G_SITOFP %0(s16)
    %3:_(s128) = G_ANYEXT %2(s32)
    $xmm0 = COPY %3(s128)
    RET 0, implicit $xmm0

...
---
name:            int32_to_float
alignment:       16
tracksRegLiveness: true
registers:
  - { id: 0, class: _ }
  - { id: 1, class: _ }
  - { id: 2, class: _ }
body:             |
  bb.1.entry:
    liveins: $edi

    ; CHECK-LABEL: name: int32_to_float
    ; CHECK: liveins: $edi
    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
    ; CHECK: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[COPY]](s32)
    ; CHECK: [[ANYEXT:%[0-9]+]]:_(s128) = G_ANYEXT [[SITOFP]](s32)
    ; CHECK: $xmm0 = COPY [[ANYEXT]](s128)
    ; CHECK: RET 0, implicit $xmm0
    %0:_(s32) = COPY $edi
    %1:_(s32) = G_SITOFP %0(s32)
    %2:_(s128) = G_ANYEXT %1(s32)
    $xmm0 = COPY %2(s128)
    RET 0, implicit $xmm0

...
---
name:            int64_to_float
alignment:       16
tracksRegLiveness: true
registers:
  - { id: 0, class: _ }
  - { id: 1, class: _ }
  - { id: 2, class: _ }
body:             |
  bb.1.entry:
    liveins: $rdi

    ; CHECK-LABEL: name: int64_to_float
    ; CHECK: liveins: $rdi
    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $rdi
    ; CHECK: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[COPY]](s64)
    ; CHECK: [[ANYEXT:%[0-9]+]]:_(s128) = G_ANYEXT [[SITOFP]](s32)
    ; CHECK: $xmm0 = COPY [[ANYEXT]](s128)
    ; CHECK: RET 0, implicit $xmm0
    %0:_(s64) = COPY $rdi
    %1:_(s32) = G_SITOFP %0(s64)
    %2:_(s128) = G_ANYEXT %1(s32)
    $xmm0 = COPY %2(s128)
    RET 0, implicit $xmm0

...
---
name:            int8_to_double
alignment:       16
tracksRegLiveness: true
registers:
  - { id: 0, class: _ }
  - { id: 1, class: _ }
  - { id: 2, class: _ }
  - { id: 3, class: _ }
body:             |
  bb.1.entry:
    liveins: $edi

    ; CHECK-LABEL: name: int8_to_double
    ; CHECK: liveins: $edi
    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
    ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
    ; CHECK: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 24
    ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C]](s8)
    ; CHECK: [[COPY2:%[0-9]+]]:_(s8) = COPY [[C]](s8)
    ; CHECK: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[COPY2]](s8)
    ; CHECK: [[SITOFP:%[0-9]+]]:_(s64) = G_SITOFP [[ASHR]](s32)
    ; CHECK: [[ANYEXT:%[0-9]+]]:_(s128) = G_ANYEXT [[SITOFP]](s64)
    ; CHECK: $xmm0 = COPY [[ANYEXT]](s128)
    ; CHECK: RET 0, implicit $xmm0
    %1:_(s32) = COPY $edi
    %0:_(s8) = G_TRUNC %1(s32)
    %2:_(s64) = G_SITOFP %0(s8)
    %3:_(s128) = G_ANYEXT %2(s64)
    $xmm0 = COPY %3(s128)
    RET 0, implicit $xmm0

...
---
name:            int16_to_double
alignment:       16
tracksRegLiveness: true
registers:
  - { id: 0, class: _ }
  - { id: 1, class: _ }
  - { id: 2, class: _ }
  - { id: 3, class: _ }
body:             |
  bb.1.entry:
    liveins: $edi

    ; CHECK-LABEL: name: int16_to_double
    ; CHECK: liveins: $edi
    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
    ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
    ; CHECK: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 16
    ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[C]](s8)
    ; CHECK: [[COPY2:%[0-9]+]]:_(s8) = COPY [[C]](s8)
    ; CHECK: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[COPY2]](s8)
    ; CHECK: [[SITOFP:%[0-9]+]]:_(s64) = G_SITOFP [[ASHR]](s32)
    ; CHECK: [[ANYEXT:%[0-9]+]]:_(s128) = G_ANYEXT [[SITOFP]](s64)
    ; CHECK: $xmm0 = COPY [[ANYEXT]](s128)
    ; CHECK: RET 0, implicit $xmm0
    %1:_(s32) = COPY $edi
    %0:_(s16) = G_TRUNC %1(s32)
    %2:_(s64) = G_SITOFP %0(s16)
    %3:_(s128) = G_ANYEXT %2(s64)
    $xmm0 = COPY %3(s128)
    RET 0, implicit $xmm0

...
---
name:            int32_to_double
alignment:       16
tracksRegLiveness: true
registers:
  - { id: 0, class: _ }
  - { id: 1, class: _ }
  - { id: 2, class: _ }
body:             |
  bb.1.entry:
    liveins: $edi

    ; CHECK-LABEL: name: int32_to_double
    ; CHECK: liveins: $edi
    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
    ; CHECK: [[SITOFP:%[0-9]+]]:_(s64) = G_SITOFP [[COPY]](s32)
    ; CHECK: [[ANYEXT:%[0-9]+]]:_(s128) = G_ANYEXT [[SITOFP]](s64)
    ; CHECK: $xmm0 = COPY [[ANYEXT]](s128)
    ; CHECK: RET 0, implicit $xmm0
    %0:_(s32) = COPY $edi
    %1:_(s64) = G_SITOFP %0(s32)
    %2:_(s128) = G_ANYEXT %1(s64)
    $xmm0 = COPY %2(s128)
    RET 0, implicit $xmm0

...
---
name:            int64_to_double
alignment:       16
tracksRegLiveness: true
registers:
  - { id: 0, class: _ }
  - { id: 1, class: _ }
  - { id: 2, class: _ }
body:             |
  bb.1.entry:
    liveins: $rdi

    ; CHECK-LABEL: name: int64_to_double
    ; CHECK: liveins: $rdi
    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $rdi
    ; CHECK: [[SITOFP:%[0-9]+]]:_(s64) = G_SITOFP [[COPY]](s64)
    ; CHECK: [[ANYEXT:%[0-9]+]]:_(s128) = G_ANYEXT [[SITOFP]](s64)
    ; CHECK: $xmm0 = COPY [[ANYEXT]](s128)
    ; CHECK: RET 0, implicit $xmm0
    %0:_(s64) = COPY $rdi
    %1:_(s64) = G_SITOFP %0(s64)
    %2:_(s128) = G_ANYEXT %1(s64)
    $xmm0 = COPY %2(s128)
    RET 0, implicit $xmm0

...