)]}'
{
  "commit": "0d9c75be2d5231ab5cbe2f3481863ec69cc534a1",
  "tree": "6268395d5f19f901fe5ae09cbaa9691154aba00e",
  "parents": [
    "a4135ae549bbc42a89cd02746e95cb9c8ebe5ff6"
  ],
  "author": {
    "name": "Stanislav Mekhanoshin",
    "email": "Stanislav.Mekhanoshin@amd.com",
    "time": "Fri Oct 31 10:58:22 2025 -0700"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Fri Oct 31 10:58:22 2025 -0700"
  },
  "message": "[AMDGPU] Reset VGPR MSBs at the end of fallthrough basic block (#164901)\n\nBy convention a basic block shall start with MSBs zero. We also\nneed to know a previous mode in all cases as SWDEV-562450 asks\nto record the old mode in the high bits of the mode.",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "1e6589eb42c15d86508fe2ff785186085ba6138b",
      "old_mode": 33188,
      "old_path": "llvm/lib/Target/AMDGPU/AMDGPULowerVGPREncoding.cpp",
      "new_id": "9b932273b2216f3f792f12f0d843040d300b7115",
      "new_mode": 33188,
      "new_path": "llvm/lib/Target/AMDGPU/AMDGPULowerVGPREncoding.cpp"
    },
    {
      "type": "modify",
      "old_id": "f508df2292e907cc7103b139c89155b4bf78aa8f",
      "old_mode": 33188,
      "old_path": "llvm/test/CodeGen/AMDGPU/vgpr-lowering-gfx1250.mir",
      "new_id": "41a7b82913bb090ac71ea06003649bfff40f76bc",
      "new_mode": 33188,
      "new_path": "llvm/test/CodeGen/AMDGPU/vgpr-lowering-gfx1250.mir"
    }
  ]
}