# RUN: llc -mtriple=ppc32-- %s -run-pass=phi-node-elimination \
# RUN:   -verify-machineinstrs -o /dev/null 2>&1
# RUN: llc -mtriple=ppc32-- %s -start-before=phi-node-elimination \
# RUN:   -verify-machineinstrs -o /dev/null 2>&1

--- |
  define void @VerifyTwoAddressCrash(i16 %div.0.i.i.i.i, i32 %L_num.0.i.i.i.i, i32 %tmp1.i.i206.i.i, i16* %P) {
    %X = shl i16 %div.0.i.i.i.i, 1
    %tmp28.i.i.i.i = shl i32 %L_num.0.i.i.i.i, 1
    %tmp31.i.i.i.i = icmp slt i32 %tmp28.i.i.i.i, %tmp1.i.i206.i.i
    %tmp31.i.i.i.i.upgrd.1 = zext i1 %tmp31.i.i.i.i to i16
    %tmp371.i.i.i.i1 = or i16 %tmp31.i.i.i.i.upgrd.1, %X
    %div.0.be.i.i.i.i = xor i16 %tmp371.i.i.i.i1, 1
    store i16 %div.0.be.i.i.i.i, i16* %P, align 2
    ret void
  }

...
---
name:            VerifyTwoAddressCrash
alignment:       4
exposesReturnsTwice: false
legalized:       false
regBankSelected: false
selected:        false
failedISel:      false
tracksRegLiveness: true
hasWinCFI:       false
registers:
  - { id: 0, class: gprc, preferred-register: '' }
  - { id: 1, class: gprc, preferred-register: '' }
  - { id: 2, class: gprc, preferred-register: '' }
  - { id: 3, class: gprc_and_gprc_nor0, preferred-register: '' }
  - { id: 4, class: gprc, preferred-register: '' }
  - { id: 5, class: crrc, preferred-register: '' }
  - { id: 6, class: crbitrc, preferred-register: '' }
  - { id: 7, class: gprc_and_gprc_nor0, preferred-register: '' }
  - { id: 8, class: gprc_and_gprc_nor0, preferred-register: '' }
  - { id: 9, class: gprc, preferred-register: '' }
  - { id: 10, class: gprc, preferred-register: '' }
  - { id: 11, class: gprc, preferred-register: '' }
liveins:
  - { reg: '$r3', virtual-reg: '%0' }
  - { reg: '$r4', virtual-reg: '%1' }
  - { reg: '$r5', virtual-reg: '%2' }
  - { reg: '$r6', virtual-reg: '%3' }
frameInfo:
  isFrameAddressTaken: false
  isReturnAddressTaken: false
  hasStackMap:     false
  hasPatchPoint:   false
  stackSize:       0
  offsetAdjustment: 0
  maxAlignment:    4
  adjustsStack:    false
  hasCalls:        false
  stackProtector:  ''
  maxCallFrameSize: 4294967295
  cvBytesOfCalleeSavedRegisters: 0
  hasOpaqueSPAdjustment: false
  hasVAStart:      false
  hasMustTailInVarArgFunc: false
  localFrameSize:  0
  savePoint:       ''
  restorePoint:    ''
fixedStack:      []
stack:           []
callSites:       []
constants:       []
machineFunctionInfo: {}
body:             |
  bb.0 (%ir-block.0):
    liveins: $r3, $r4, $r5, $r6

    %3:gprc_and_gprc_nor0 = COPY killed $r6
    %2:gprc = COPY killed $r5
    %1:gprc = COPY killed $r4
    %0:gprc = COPY killed $r3
    %4:gprc = RLWINM killed %1, 1, 0, 30
    %5:crrc = CMPW killed %4, killed %2
    %6:crbitrc = COPY killed %5.sub_lt
    %7:gprc_and_gprc_nor0 = LI 0
    %8:gprc_and_gprc_nor0 = LI 1
    %9:gprc = ISEL killed %8, killed %7, killed %6
    %10:gprc = RLWIMI killed %9, killed %0, 1, 0, 30
    %11:gprc = XORI killed %10, 1
    STH killed %11, 0, killed %3 :: (store (s16) into %ir.P)
    BLR implicit $lr, implicit $rm

...

# Used to result in
#
# Bad machine code: Two-address instruction operands must be identical
# - function:    VerifyTwoAddressCrash
# - basic block: %bb.0
# - instruction: %10:gprc = RLWIMI killed %9:gprc(tied-def 0), killed %0:gprc, 1, 0, 30
# - operand 1:   killed %9:gprc(tied-def 0)
# LLVM ERROR: Found 1 machine code errors.
# Just verify that we do not crash (or get verifier error).