| //===- X86TargetParser.def - X86 target parsing defines ---------*- C++ -*-===// |
| // |
| // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| // See https://llvm.org/LICENSE.txt for license information. |
| // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| // |
| //===----------------------------------------------------------------------===// |
| // |
| // This file provides defines to build up the X86 target parser's logic. |
| // |
| //===----------------------------------------------------------------------===// |
| |
| // NOTE: NO INCLUDE GUARD DESIRED! |
| |
| #ifndef X86_VENDOR |
| #define X86_VENDOR(ENUM, STR) |
| #endif |
| X86_VENDOR(VENDOR_INTEL, "intel") |
| X86_VENDOR(VENDOR_AMD, "amd") |
| #undef X86_VENDOR |
| |
| // This macro is used for cpu types present in compiler-rt/libgcc. |
| #ifndef X86_CPU_TYPE |
| #define X86_CPU_TYPE(ENUM, STR) |
| #endif |
| |
| #ifndef X86_CPU_TYPE_ALIAS |
| #define X86_CPU_TYPE_ALIAS(ENUM, STR) |
| #endif |
| |
| // This list must match what is implemented in libgcc and compilert-rt. Clang |
| // uses this to know how to implement __builtin_cpu_is. |
| X86_CPU_TYPE(INTEL_BONNELL, "bonnell") |
| X86_CPU_TYPE(INTEL_CORE2, "core2") |
| X86_CPU_TYPE(INTEL_COREI7, "corei7") |
| X86_CPU_TYPE(AMDFAM10H, "amdfam10h") |
| X86_CPU_TYPE(AMDFAM15H, "amdfam15h") |
| X86_CPU_TYPE(INTEL_SILVERMONT, "silvermont") |
| X86_CPU_TYPE(INTEL_KNL, "knl") |
| X86_CPU_TYPE(AMD_BTVER1, "btver1") |
| X86_CPU_TYPE(AMD_BTVER2, "btver2") |
| X86_CPU_TYPE(AMDFAM17H, "amdfam17h") |
| X86_CPU_TYPE(INTEL_KNM, "knm") |
| X86_CPU_TYPE(INTEL_GOLDMONT, "goldmont") |
| X86_CPU_TYPE(INTEL_GOLDMONT_PLUS, "goldmont-plus") |
| X86_CPU_TYPE(INTEL_TREMONT, "tremont") |
| X86_CPU_TYPE(AMDFAM19H, "amdfam19h") |
| |
| // Alternate names supported by __builtin_cpu_is and target multiversioning. |
| X86_CPU_TYPE_ALIAS(INTEL_BONNELL, "atom") |
| X86_CPU_TYPE_ALIAS(AMDFAM10H, "amdfam10") |
| X86_CPU_TYPE_ALIAS(AMDFAM15H, "amdfam15") |
| X86_CPU_TYPE_ALIAS(INTEL_SILVERMONT, "slm") |
| |
| #undef X86_CPU_TYPE_ALIAS |
| #undef X86_CPU_TYPE |
| |
| // This macro is used for cpu subtypes present in compiler-rt/libgcc. |
| #ifndef X86_CPU_SUBTYPE |
| #define X86_CPU_SUBTYPE(ENUM, STR) |
| #endif |
| |
| // This list must match what is implemented in libgcc and compilert-rt. Clang |
| // uses this to know how to implement __builtin_cpu_is. |
| X86_CPU_SUBTYPE(INTEL_COREI7_NEHALEM, "nehalem") |
| X86_CPU_SUBTYPE(INTEL_COREI7_WESTMERE, "westmere") |
| X86_CPU_SUBTYPE(INTEL_COREI7_SANDYBRIDGE, "sandybridge") |
| X86_CPU_SUBTYPE(AMDFAM10H_BARCELONA, "barcelona") |
| X86_CPU_SUBTYPE(AMDFAM10H_SHANGHAI, "shanghai") |
| X86_CPU_SUBTYPE(AMDFAM10H_ISTANBUL, "istanbul") |
| X86_CPU_SUBTYPE(AMDFAM15H_BDVER1, "bdver1") |
| X86_CPU_SUBTYPE(AMDFAM15H_BDVER2, "bdver2") |
| X86_CPU_SUBTYPE(AMDFAM15H_BDVER3, "bdver3") |
| X86_CPU_SUBTYPE(AMDFAM15H_BDVER4, "bdver4") |
| X86_CPU_SUBTYPE(AMDFAM17H_ZNVER1, "znver1") |
| X86_CPU_SUBTYPE(INTEL_COREI7_IVYBRIDGE, "ivybridge") |
| X86_CPU_SUBTYPE(INTEL_COREI7_HASWELL, "haswell") |
| X86_CPU_SUBTYPE(INTEL_COREI7_BROADWELL, "broadwell") |
| X86_CPU_SUBTYPE(INTEL_COREI7_SKYLAKE, "skylake") |
| X86_CPU_SUBTYPE(INTEL_COREI7_SKYLAKE_AVX512, "skylake-avx512") |
| X86_CPU_SUBTYPE(INTEL_COREI7_CANNONLAKE, "cannonlake") |
| X86_CPU_SUBTYPE(INTEL_COREI7_ICELAKE_CLIENT, "icelake-client") |
| X86_CPU_SUBTYPE(INTEL_COREI7_ICELAKE_SERVER, "icelake-server") |
| X86_CPU_SUBTYPE(AMDFAM17H_ZNVER2, "znver2") |
| X86_CPU_SUBTYPE(INTEL_COREI7_CASCADELAKE, "cascadelake") |
| X86_CPU_SUBTYPE(INTEL_COREI7_TIGERLAKE, "tigerlake") |
| X86_CPU_SUBTYPE(INTEL_COREI7_COOPERLAKE, "cooperlake") |
| X86_CPU_SUBTYPE(INTEL_COREI7_SAPPHIRERAPIDS, "sapphirerapids") |
| X86_CPU_SUBTYPE(INTEL_COREI7_ALDERLAKE, "alderlake") |
| X86_CPU_SUBTYPE(AMDFAM19H_ZNVER3, "znver3") |
| X86_CPU_SUBTYPE(INTEL_COREI7_ROCKETLAKE, "rocketlake") |
| #undef X86_CPU_SUBTYPE |
| |
| // This macro is used for cpu types present in compiler-rt/libgcc. The third |
| // parameter PRIORITY is as required by the attribute 'target' checking. Note |
| // that not all are supported/prioritized by GCC, so synchronization with GCC's |
| // implementation may require changing some existing values. |
| // |
| // We cannot just re-sort the list though because its order is dictated by the |
| // order of bits in CodeGenFunction::GetX86CpuSupportsMask. |
| #ifndef X86_FEATURE_COMPAT |
| #define X86_FEATURE_COMPAT(ENUM, STR, PRIORITY) X86_FEATURE(ENUM, STR) |
| #endif |
| |
| #ifndef X86_FEATURE |
| #define X86_FEATURE(ENUM, STR) |
| #endif |
| |
| X86_FEATURE_COMPAT(CMOV, "cmov", 0) |
| X86_FEATURE_COMPAT(MMX, "mmx", 1) |
| X86_FEATURE_COMPAT(POPCNT, "popcnt", 9) |
| X86_FEATURE_COMPAT(SSE, "sse", 2) |
| X86_FEATURE_COMPAT(SSE2, "sse2", 3) |
| X86_FEATURE_COMPAT(SSE3, "sse3", 4) |
| X86_FEATURE_COMPAT(SSSE3, "ssse3", 5) |
| X86_FEATURE_COMPAT(SSE4_1, "sse4.1", 7) |
| X86_FEATURE_COMPAT(SSE4_2, "sse4.2", 8) |
| X86_FEATURE_COMPAT(AVX, "avx", 12) |
| X86_FEATURE_COMPAT(AVX2, "avx2", 18) |
| X86_FEATURE_COMPAT(SSE4_A, "sse4a", 6) |
| X86_FEATURE_COMPAT(FMA4, "fma4", 14) |
| X86_FEATURE_COMPAT(XOP, "xop", 15) |
| X86_FEATURE_COMPAT(FMA, "fma", 16) |
| X86_FEATURE_COMPAT(AVX512F, "avx512f", 19) |
| X86_FEATURE_COMPAT(BMI, "bmi", 13) |
| X86_FEATURE_COMPAT(BMI2, "bmi2", 17) |
| X86_FEATURE_COMPAT(AES, "aes", 10) |
| X86_FEATURE_COMPAT(PCLMUL, "pclmul", 11) |
| X86_FEATURE_COMPAT(AVX512VL, "avx512vl", 20) |
| X86_FEATURE_COMPAT(AVX512BW, "avx512bw", 21) |
| X86_FEATURE_COMPAT(AVX512DQ, "avx512dq", 22) |
| X86_FEATURE_COMPAT(AVX512CD, "avx512cd", 23) |
| X86_FEATURE_COMPAT(AVX512ER, "avx512er", 24) |
| X86_FEATURE_COMPAT(AVX512PF, "avx512pf", 25) |
| X86_FEATURE_COMPAT(AVX512VBMI, "avx512vbmi", 26) |
| X86_FEATURE_COMPAT(AVX512IFMA, "avx512ifma", 27) |
| X86_FEATURE_COMPAT(AVX5124VNNIW, "avx5124vnniw", 28) |
| X86_FEATURE_COMPAT(AVX5124FMAPS, "avx5124fmaps", 29) |
| X86_FEATURE_COMPAT(AVX512VPOPCNTDQ, "avx512vpopcntdq", 30) |
| X86_FEATURE_COMPAT(AVX512VBMI2, "avx512vbmi2", 31) |
| X86_FEATURE_COMPAT(GFNI, "gfni", 32) |
| X86_FEATURE_COMPAT(VPCLMULQDQ, "vpclmulqdq", 33) |
| X86_FEATURE_COMPAT(AVX512VNNI, "avx512vnni", 34) |
| X86_FEATURE_COMPAT(AVX512BITALG, "avx512bitalg", 35) |
| X86_FEATURE_COMPAT(AVX512BF16, "avx512bf16", 36) |
| X86_FEATURE_COMPAT(AVX512VP2INTERSECT, "avx512vp2intersect", 37) |
| // Features below here are not in libgcc/compiler-rt. |
| X86_FEATURE (3DNOW, "3dnow") |
| X86_FEATURE (3DNOWA, "3dnowa") |
| X86_FEATURE (64BIT, "64bit") |
| X86_FEATURE (ADX, "adx") |
| X86_FEATURE (AMX_BF16, "amx-bf16") |
| X86_FEATURE (AMX_INT8, "amx-int8") |
| X86_FEATURE (AMX_TILE, "amx-tile") |
| X86_FEATURE (CLDEMOTE, "cldemote") |
| X86_FEATURE (CLFLUSHOPT, "clflushopt") |
| X86_FEATURE (CLWB, "clwb") |
| X86_FEATURE (CLZERO, "clzero") |
| X86_FEATURE (CMPXCHG16B, "cx16") |
| X86_FEATURE (CMPXCHG8B, "cx8") |
| X86_FEATURE (CRC32, "crc32") |
| X86_FEATURE (ENQCMD, "enqcmd") |
| X86_FEATURE (F16C, "f16c") |
| X86_FEATURE (FSGSBASE, "fsgsbase") |
| X86_FEATURE (FXSR, "fxsr") |
| X86_FEATURE (INVPCID, "invpcid") |
| X86_FEATURE (KL, "kl") |
| X86_FEATURE (WIDEKL, "widekl") |
| X86_FEATURE (LWP, "lwp") |
| X86_FEATURE (LZCNT, "lzcnt") |
| X86_FEATURE (MOVBE, "movbe") |
| X86_FEATURE (MOVDIR64B, "movdir64b") |
| X86_FEATURE (MOVDIRI, "movdiri") |
| X86_FEATURE (MWAITX, "mwaitx") |
| X86_FEATURE (PCONFIG, "pconfig") |
| X86_FEATURE (PKU, "pku") |
| X86_FEATURE (PREFETCHWT1, "prefetchwt1") |
| X86_FEATURE (PRFCHW, "prfchw") |
| X86_FEATURE (PTWRITE, "ptwrite") |
| X86_FEATURE (RDPID, "rdpid") |
| X86_FEATURE (RDRND, "rdrnd") |
| X86_FEATURE (RDSEED, "rdseed") |
| X86_FEATURE (RTM, "rtm") |
| X86_FEATURE (SAHF, "sahf") |
| X86_FEATURE (SERIALIZE, "serialize") |
| X86_FEATURE (SGX, "sgx") |
| X86_FEATURE (SHA, "sha") |
| X86_FEATURE (SHSTK, "shstk") |
| X86_FEATURE (TBM, "tbm") |
| X86_FEATURE (TSXLDTRK, "tsxldtrk") |
| X86_FEATURE (UINTR, "uintr") |
| X86_FEATURE (VAES, "vaes") |
| X86_FEATURE (VZEROUPPER, "vzeroupper") |
| X86_FEATURE (WAITPKG, "waitpkg") |
| X86_FEATURE (WBNOINVD, "wbnoinvd") |
| X86_FEATURE (X87, "x87") |
| X86_FEATURE (XSAVE, "xsave") |
| X86_FEATURE (XSAVEC, "xsavec") |
| X86_FEATURE (XSAVEOPT, "xsaveopt") |
| X86_FEATURE (XSAVES, "xsaves") |
| X86_FEATURE (HRESET, "hreset") |
| X86_FEATURE (AVX512FP16, "avx512fp16") |
| X86_FEATURE (AVXVNNI, "avxvnni") |
| // These features aren't really CPU features, but the frontend can set them. |
| X86_FEATURE (RETPOLINE_EXTERNAL_THUNK, "retpoline-external-thunk") |
| X86_FEATURE (RETPOLINE_INDIRECT_BRANCHES, "retpoline-indirect-branches") |
| X86_FEATURE (RETPOLINE_INDIRECT_CALLS, "retpoline-indirect-calls") |
| X86_FEATURE (LVI_CFI, "lvi-cfi") |
| X86_FEATURE (LVI_LOAD_HARDENING, "lvi-load-hardening") |
| #undef X86_FEATURE_COMPAT |
| #undef X86_FEATURE |
| |
| #ifndef CPU_SPECIFIC |
| #define CPU_SPECIFIC(NAME, MANGLING, FEATURES) |
| #endif |
| |
| #ifndef CPU_SPECIFIC_ALIAS |
| #define CPU_SPECIFIC_ALIAS(NEW_NAME, NAME) |
| #endif |
| |
| CPU_SPECIFIC("generic", 'A', "") |
| CPU_SPECIFIC("pentium", 'B', "") |
| CPU_SPECIFIC("pentium_pro", 'C', "+cmov") |
| CPU_SPECIFIC("pentium_mmx", 'D', "+mmx") |
| CPU_SPECIFIC("pentium_ii", 'E', "+cmov,+mmx") |
| CPU_SPECIFIC("pentium_iii", 'H', "+cmov,+mmx,+sse") |
| CPU_SPECIFIC_ALIAS("pentium_iii_no_xmm_regs", "pentium_iii") |
| CPU_SPECIFIC("pentium_4", 'J', "+cmov,+mmx,+sse,+sse2") |
| CPU_SPECIFIC("pentium_m", 'K', "+cmov,+mmx,+sse,+sse2") |
| CPU_SPECIFIC("pentium_4_sse3", 'L', "+cmov,+mmx,+sse,+sse2,+sse3") |
| CPU_SPECIFIC("core_2_duo_ssse3", 'M', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3") |
| CPU_SPECIFIC("core_2_duo_sse4_1", 'N', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1") |
| CPU_SPECIFIC("atom", 'O', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+movbe") |
| CPU_SPECIFIC("atom_sse4_2", 'c', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+popcnt") |
| CPU_SPECIFIC("core_i7_sse4_2", 'P', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+popcnt") |
| CPU_SPECIFIC("core_aes_pclmulqdq", 'Q', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+popcnt") |
| CPU_SPECIFIC("atom_sse4_2_movbe", 'd', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt") |
| CPU_SPECIFIC("goldmont", 'i', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt") |
| CPU_SPECIFIC("sandybridge", 'R', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+popcnt,+avx") |
| CPU_SPECIFIC_ALIAS("core_2nd_gen_avx", "sandybridge") |
| CPU_SPECIFIC("ivybridge", 'S', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+popcnt,+f16c,+avx") |
| CPU_SPECIFIC_ALIAS("core_3rd_gen_avx", "ivybridge") |
| CPU_SPECIFIC("haswell", 'V', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2") |
| CPU_SPECIFIC_ALIAS("core_4th_gen_avx", "haswell") |
| CPU_SPECIFIC("core_4th_gen_avx_tsx", 'W', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2") |
| CPU_SPECIFIC("broadwell", 'X', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+adx") |
| CPU_SPECIFIC_ALIAS("core_5th_gen_avx", "broadwell") |
| CPU_SPECIFIC("core_5th_gen_avx_tsx", 'Y', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+adx") |
| CPU_SPECIFIC("knl", 'Z', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+avx512f,+adx,+avx512er,+avx512pf,+avx512cd") |
| CPU_SPECIFIC_ALIAS("mic_avx512", "knl") |
| CPU_SPECIFIC("skylake", 'b', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+adx,+mpx") |
| CPU_SPECIFIC( "skylake_avx512", 'a', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+avx512dq,+avx512f,+adx,+avx512cd,+avx512bw,+avx512vl,+clwb") |
| CPU_SPECIFIC("cannonlake", 'e', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+avx512dq,+avx512f,+adx,+avx512ifma,+avx512cd,+avx512bw,+avx512vl,+avx512vbmi") |
| CPU_SPECIFIC("knm", 'j', "+cmov,+mmx,+sse,+sse2,+sse3,+ssse3,+sse4.1,+sse4.2,+movbe,+popcnt,+f16c,+avx,+fma,+bmi,+lzcnt,+avx2,+avx512f,+adx,+avx512er,+avx512pf,+avx512cd,+avx5124fmaps,+avx5124vnniw,+avx512vpopcntdq") |
| |
| #undef CPU_SPECIFIC_ALIAS |
| #undef CPU_SPECIFIC |
