tree 0a922a8b91fe015926cc3b4fe5c938246e3a2735
parent 621a5a976e2364677e57f1b3ab37417f2ed38fba
author Simon Pilgrim <llvm-dev@redking.me.uk> 1747753676 +0100
committer GitHub <noreply@github.com> 1747753676 +0100
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[X86] matchBinaryPermuteShuffle - match AVX512 "cross lane" SHLDQ/SRLDQ style patterns using VALIGN (#140538)

Very similar to what we do in lowerShuffleAsVALIGN

I've updated isTargetShuffleEquivalent to correctly handle SM_SentinelZero in the expected shuffle mask, but it only allows an exact match (or the test mask was undef) - it can't be used to match zero elements with MaskedVectorIsZero.

Noticed while working on #140516