)]}'
{
  "commit": "082251bba4effea7f60191c6cbddacb3705c07db",
  "tree": "dff60797f07b93c2f82ec61c8b3cc24dc37c0dc1",
  "parents": [
    "52360d195b85608c677d781272534dfa61e9a1c3"
  ],
  "author": {
    "name": "Jameson Nash",
    "email": "vtjnash@gmail.com",
    "time": "Wed Jun 11 21:49:01 2025 -0400"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Wed Jun 11 21:49:01 2025 -0400"
  },
  "message": "[AArch64] fix trampoline implementation: use X15 (#126743)\n\nAAPCS64 reserves any of X9-X15 for a compiler to choose to use for this\npurpose, and says not to use X16 or X18 like GCC (and the previous\nimplementation) chose to use. The X18 register may need to get used by\nthe kernel in some circumstances, as specified by the platform ABI, so\nit is generally an unwise choice. Simply choosing a different register\nfixes the problem of this being broken on any platform that actually\nfollows the platform ABI (which is all of them except EABI, if I am\nreading this linux kernel bug correctly\nhttps://lkml2.uits.iu.edu/hypermail/linux/kernel/2001.2/01502.html). As\na side benefit, also generate slightly better code and avoids needing\nthe compiler-rt to be present. I did that by following the XCore\nimplementation instead of PPC (although in hindsight, following the\nRISCV might have been slightly more readable). That X18 is wrong to use\nfor this purpose has been known for many years (e.g.\nhttps://www.mail-archive.com/gcc@gcc.gnu.org/msg76934.html) and also\nknown that fixing this to use one of the correct registers is not an ABI\nbreak, since this only appears inside of a translation unit. Some of the\nother temporary registers (e.g. X9) are already reserved inside llvm for\ninternal use as a generic temporary register in the prologue before\nsaving registers, while X15 was already used in rare cases as a scratch\nregister in the prologue as well, so I felt that seemed the most logical\nchoice to choose here.",
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