[AArch64][GlobalISel] Add disjoint handling for add_and_or_is_add. (#123594)
This allows us to easily detect, without known-bits, that the or in a
fshl/fshr is disjoint allowing us to use usra under aarch64.
diff --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
index 5a16d72..f0b241f 100644
--- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
@@ -7264,7 +7264,7 @@
}
}
- MIRBuilder.buildOr(Dst, ShX, ShY);
+ MIRBuilder.buildOr(Dst, ShX, ShY, MachineInstr::Disjoint);
MI.eraseFromParent();
return Legalized;
}
