)]}'
{
  "commit": "03912a1de59876011387de9ac5ec968c58018da0",
  "tree": "1a434eb60478fd94391714d826a9e964755d35b4",
  "parents": [
    "f4b5c24022ca5805eeafaaeb417a35a8b6d6c03d"
  ],
  "author": {
    "name": "David Green",
    "email": "david.green@arm.com",
    "time": "Mon Aug 18 15:59:44 2025 +0100"
  },
  "committer": {
    "name": "GitHub",
    "email": "noreply@github.com",
    "time": "Mon Aug 18 14:59:44 2025 +0000"
  },
  "message": "[GlobalISel] Translate scalar sequential vecreduce.fadd/fmul as fadd/fmul. (#153966)\n\nA llvm.vector.reduce.fadd(float, \u003c1 x float\u003e) will be translated to\nG_VECREDUCE_SEQ_FADD with two scalar operands, which is illegal\naccording to the verifier. This makes sure we generate a fadd/fmul\ninstead.",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "7ca02ad756f510d7e82b0d4550cf9b1303e591a7",
      "old_mode": 33188,
      "old_path": "llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp",
      "new_id": "8424a8108d76e2aa000d60596b5e30fac1fa0d29",
      "new_mode": 33188,
      "new_path": "llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp"
    },
    {
      "type": "modify",
      "old_id": "c38e03b41dc06c7ba172b724d4c6e5c035cfc017",
      "old_mode": 33188,
      "old_path": "llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-reductions.ll",
      "new_id": "c791e35946f726c65938d6f57672844ed483d468",
      "new_mode": 33188,
      "new_path": "llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-reductions.ll"
    }
  ]
}