tree c79f4f4af2bc55fae87177b8f292f34cb68fb641
parent 221b0117fd21d45098ead779a040a4b939a5c84f
author Michael Maitland <michaeltmaitland@gmail.com> 1742498404 -0400
committer GitHub <noreply@github.com> 1742498404 -0400
gpgsig -----BEGIN PGP SIGNATURE-----
 
 wsFcBAABCAAQBQJn3GpkCRC1aQ7uu5UhlAAAqTcQAHIYph7asSW0LXtsSLo7PRaA
 RYI7gXSjBPsb3pf/p1LYWH4tVmVQKltT9N+SJ49FPSjeGuh1sn00cu4GShlKlybx
 1MfI0zhF/QBcKAD71A4l3s5RUqujzbEhU1mYyzIJ2MI+vE0qPpd9byC/FPOsik1L
 n8gZAh0znXVzv7mfg9i5Hbwq6Mu/PHI3Mpg8/+uIdDmP084zCTcxxccK0JN78mzv
 3aZUFzp4VpSAwU/B9pyREmBfTQSVLd0uszaaFF8wospSoYcf8WU9aWl49u1jJlyh
 qt5jHqZI4gbQozxLfdRPaLciQkoC/M99kG+09lF/wlDpYDONb6EbK+5y2kdobEUI
 YllH/fH5vtFVxplfDjKkdGkNzu1tzn4hBHFaCVH92DnpGHJlqCe4SNrS62Lgc59T
 wdxbhsnf8rxPLl+Dm8IfTUnYRGdlfPESXzB6c1u3zh17rb/EsRz4jI87CQvpQGXr
 yQHWHnseQNOushrKtN7qCaMaltGKWg9pkw1IYFg6ZFq1jFpIe1pHF/jK+CGQA03H
 i2MBOerFzLVFTCsxS5P8VnltJkj4gkzoO2tFDrwDLx/lTMeMXb1MBq3Qp/DUr2oT
 kS7jIwujm+H+6jWSj8pxHLwOBZpMxvL5oiplt99Psv39nScz7rCpsS0MgrggRjQy
 xgPs6j0vzSleqB6qPQNW
 =nv5R
 -----END PGP SIGNATURE-----
 

[RISCV][RegAlloc] Add getCSRFirstUseCost for RISC-V (#131349)

This is based off of 63efd8e7e68bc.

The following table shows the percent change to the dynamic instruction
count when the function in this patch returns 0 (default) versus other
values.

| benchmark | % speedup 1 over 0 | % speedup 4 over 0 | % speedup 16
over 0 | % speedup 64 over 0 | % speedup 128 over 0 |
| --------------- | ---------------------- | --------------------- |
--------------------- | -------------------- | -------------------- |
| 500.perlbench_r | 0.001018570165 | 0.001049508358 | 0.001001106529 |
0.03382582818 | 0.03395354577 |
| 502.gcc_r | 0.02850551412 | 0.02170512371 | 0.01453021263 |
0.06011008637 | 0.1215691521 |
| 505.mcf_r | -0.00009506373338 | -0.00009090057642 | -0.0000860991497 |
-0.00005027849766 | 0.00001251173791 |
| 520.omnetpp_r | 0.2958940288 | 0.2959715925 | 0.2961141505 |
0.2959823497 | 0.2963124341 |
| 523.xalancbmk_r | -0.0327074721 | -0.01037021046 | -0.3226810542 |
0.02127133714 | 0.02765388389 |
| 525.x264_r | 0.0000001381714403 | -0.00000007041540345 |
-0.00000002156399465 | 0.0000002108993364 | 0.0000002463382874 |
| 531.deepsjeng_r | 0.00000000339777238 | 0.000000003874652714 |
0.000000003636212547 | 0.000000003874652714 | 0.000000003159332213 |
| 541.leela_r | 0.0009186059953 | -0.000424159199 | 0.0004984456879 |
0.274948447 | 0.8135521414 |
| 557.xz_r | -0.000000003547118854 | -0.00004896449559 |
-0.00004910691576 | -0.0000491109983 | -0.00004895599589 |
| geomean | 0.03265937388 | 0.03424232324 | -0.00107917442 |
0.07629116165 | 0.1439913192 |

The following table shows the percent change to the runtime when the
function in this patch returns 0 (default) versus other values.

| benchmark | % speedup 1 over 0 | % speedup 4 over 0 | % speedup 16
over 0 | % speedup 64 over 0 | %speedup 128 over 0 |
| --------------- | ------------------ | ------------------ |
------------------- | ------------------- | ------------------- |
| 500.perlbench_r | 0.1722356761 | 0.2269681109 | 0.2596825578 |
0.361573851 | 1.15041305 |
| 502.gcc_r | -0.548415855 | -0.06187002799 | -0.5553684674 |
-0.8876686237 | -0.4668665535 |
| 505.mcf_r | -0.8786414258 | -0.4150938441 | -1.035517726 |
-0.1860770377 | -0.01904825648 |
| 520.omnetpp_r | 0.4130256072 | 0.6595976188 | 0.897332171 |
0.6252625622 | 0.3869467278 |
| 523.xalancbmk_r | 1.318132014 | -0.003927574 | 1.025962975 |
1.090320253 | -0.789206202 |
| 525.x264_r | -0.03112871796 | -0.00167557587 | 0.06932423155 |
-0.1919840015 | -0.1203585732 |
| 531.deepsjeng_r | -0.259516072 | -0.01973455652 | -0.2723227894 |
-0.005417022257 | -0.02222388177 |
| 541.leela_r | -0.3497178495 | -0.3510447393 | 0.1274508001 |
0.6485542452 | 0.2880651727 |
| 557.xz_r | 0.7683565263 | -0.2197509447 | -0.0431183874 |
0.07518130872 | 0.5236853039 |
| geomean | 0.06506952742 | -0.0211865386 | 0.05072694648 | 0.1684530637
| 0.1020533557 |

I chose to set the value to 5 on RISC-V because it has improvement to
both the dynamic IC and the runtime and because it showed good results
empirically and had a similar effect as setting it to higher numbers.

I looked at some diff and it seems like this patch leads to two things:
1. Less spilling -- not spilling the CSR led to better register
allocation and helped us avoid spills down the line
2. Avoid spilling CSR but spill more on paths that static heuristics
estimate as cold.