)]}'
{
  "id": "12e15c3ef55b8d8dc416f3c830d2045f522a7467",
  "repo": "llvm-project.git",
  "revision": "refs/heads/main",
  "path": "llvm/test/CodeGen/MIR/AMDGPU/register-allocation-antihints-mir-print-parse.mir"
}