tree 0114db42d623bfe9050907f6f1197154d74ae45c
parent ec6cfefeedbcde0447632db07cf107d88e8b54a0
author Ryan Prichard <rprichard@google.com> 1537995038 +0000
committer Ryan Prichard <rprichard@google.com> 1537995038 +0000

[AArch64] Fix range check of R_AARCH64_TLSLE_ADD_TPREL_HI12

Summary:
An AArch64 LE relocation is a positive ("variant 1") offset. This
relocation is used to write the upper 12 bits of a 24-bit offset into an
add instruction:

    add x0, x0, :tprel_hi12:v1

The comment in the ARM docs for R_AARCH64_TLSLE_ADD_TPREL_HI12 is:

"Set an ADD immediate field to bits [23:12] of X; check 0 <= X < 2^24."

Reviewers: javed.absar, espindola, ruiu, peter.smith, zatrazz

Reviewed By: ruiu

Subscribers: emaste, arichardson, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D52525

git-svn-id: https://llvm.org/svn/llvm-project/lld/trunk@343144 91177308-0d34-0410-b5e6-96231b3b80d8