[libunwind][ARM] Fix loading FP registers on big-endian targets
Summary:
The function Unwind-EHABI.cpp:_Unwind_VRS_Pop loads the saved values of
64-bit FP registers as two 32-bit words because they might not be
8-byte aligned. Combining these words into a 64-bit value has to be
done differently on big-endian platforms.
Reviewers: ostannard, john.brawn, dmgreen
Reviewed By: ostannard
Subscribers: kristof.beyls, christof, libcxx-commits
Tags: #libc
Differential Revision: https://reviews.llvm.org/D64996
git-svn-id: https://llvm.org/svn/llvm-project/libunwind/trunk@366587 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/src/Unwind-EHABI.cpp b/src/Unwind-EHABI.cpp
index 4ff5e31..8ee37d0 100644
--- a/src/Unwind-EHABI.cpp
+++ b/src/Unwind-EHABI.cpp
@@ -941,8 +941,13 @@
// format 1", which is equivalent to FSTMD + a padding word.
for (uint32_t i = first; i < end; ++i) {
// SP is only 32-bit aligned so don't copy 64-bit at a time.
- uint64_t value = *sp++;
- value |= ((uint64_t)(*sp++)) << 32;
+ uint32_t w0 = *sp++;
+ uint32_t w1 = *sp++;
+#ifdef __LITTLE_ENDIAN__
+ uint64_t value = (w1 << 32) | w0;
+#else
+ uint64_t value = (w0 << 32) | w1;
+#endif
if (_Unwind_VRS_Set(context, regclass, i, representation, &value) !=
_UVRSR_OK)
return _UVRSR_FAILED;
