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llvm / clang / refs/heads/google/stable / lib / Basic / Targets
  1. 7bdbc78 Enable intrinsics of AVX512_BF16, which are supported for BFLOAT16 in Cooper Lake by Luo, Yuanke · 6 years ago
  2. 7a72a8b [COFF, ARM64] Align global symbol by size for ARM64 MSVC ABI by Tom Tan · 6 years ago
  3. 63e574d AMDGPU: Enable _Float16 by Yaxun Liu · 6 years ago
  4. de845c0 [AArch64] Initialize HasMTE by Vitaly Buka · 6 years ago
  5. bf0e874 [AArch64] Add support for MTE intrinsics by Javed Absar · 6 years ago
  6. 276b4e7 [BPF] do not generate predefined macro bpf by Yonghong Song · 6 years ago
  7. eee685e [CUDA] Implemented _[bi]mma* builtins. by Artem Belevich · 6 years ago
  8. bdc6d20 [AMDGPU] rename vi-insts into gfx8-insts by Stanislav Mekhanoshin · 6 years ago
  9. b44ac4f [WebAssembly] Add Emscripten OS definition + small_printf by Alon Zakai · 6 years ago
  10. 4662945 Fix Wimplicit-fallthrough warning introduced in rL357466. NFCI. by Simon Pilgrim · 6 years ago
  11. fb2e212 [PowerPC] Fix issue with inline asm - soft float mode by Strahinja Petrovic · 6 years ago
  12. ce76f24 Range-style std::find{,_if} -> llvm::find{,_if}. NFC by Fangrui Song · 6 years ago
  13. ed92348 [WebAssembly] Add mutable globals feature by Thomas Lively · 6 years ago
  14. d311fb0 [X86] Correct the value of MaxAtomicInlineWidth for pre-586 cpus by Craig Topper · 6 years ago
  15. 8338647 [X86] Use the CPUKind enum from PROC_ALIAS to directly get the CPUKind in fillValidCPUList. by Craig Topper · 6 years ago
  16. e993d49 [X86] Remove getCPUKindCanonicalName which is unused. by Craig Topper · 6 years ago
  17. b4f4320 [X86] Separate PentiumPro and i686. They aren't aliases in the backend. by Craig Topper · 6 years ago
  18. c6f3df0 [AMDGPU] Add the missing clang change of the experimental buffer fat pointer by Michael Liao · 6 years ago
  19. 849c99f Reland the rest of "Add AIX Target Info" by Jason Liu · 6 years ago
  20. f213fe0 [X86] Only define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16 in 64-bit mode. by Craig Topper · 6 years ago
  21. 82ec7d9 Revert "Add AIX Target Info" by Jason Liu · 6 years ago
  22. bc8019d Add AIX Target Info by Jason Liu · 6 years ago
  23. 309f4af [X86] Remove 'cx16' from 'prescott' and 'yonah' as they are 32-bit only CPUs and cmpxchg16b requires 64-bit mode. by Craig Topper · 6 years ago
  24. 8643b2a [IR][ARM] Add function pointer alignment to datalayout by Michael Platings · 6 years ago
  25. fbb9516 Rollback of rL355585. by Mitch Phillips · 6 years ago
  26. 6ba81a0 [IR][ARM] Add function pointer alignment to datalayout by Michael Platings · 6 years ago
  27. c9de4d4 Revert "[IR][ARM] Add function pointer alignment to datalayout" by Mitch Phillips · 6 years ago
  28. 4ae038e [IR][ARM] Add function pointer alignment to datalayout by Michael Platings · 6 years ago
  29. fb0be32 [X86] AMD znver2 enablement by Ganesh Gopalasubramanian · 6 years ago
  30. 8569f81 [ARM] Add pre-defined macros for ROPI and RWPI by Oliver Stannard · 6 years ago
  31. 6a9d9dd [X86] Prevent clang clobber checking for asm flag constraints. by Nirav Dave · 6 years ago
  32. 893b852 [X86] Add clang support for X86 flag output parameters. by Nirav Dave · 6 years ago
  33. bbbf618 [PowerPC] Stop defining _ARCH_PWR6X on POWER7 and up by Hubert Tong · 6 years ago
  34. 6f25168 [Headers][mips] Add `__attribute__((__mode__(__unwind_word__)))` to the _Unwind_Word / _Unwind_SWord definitions by Simon Atanasyan · 6 years ago
  35. 45e810d long double is double on OpenBSD/NetBSD/PPC. by Brad Smith · 6 years ago
  36. e120056 [AMDGPU] Split dot-insts feature by Stanislav Mekhanoshin · 6 years ago
  37. a1d0351 bpf: teach BPF driver about the new CPU "v3" by Jiong Wang · 6 years ago
  38. 741e845 [WebAssembly] Add atomics target option by Heejin Ahn · 6 years ago
  39. cac247a [DEBUG_INFO][NVPTX] Generate correct data about variable address class. by Alexey Bataev · 6 years ago
  40. 453a2ff Do not copy long double and 128-bit fp format from aux target for AMDGPU by Yaxun Liu · 6 years ago
  41. a5f6431 [WebAssembly] Add bulk memory target feature by Thomas Lively · 6 years ago
  42. 23d1a86 [HIP] Fix size_t for MSVC environment by Yaxun Liu · 6 years ago
  43. c92e6f5 Disable _Float16 for non ARM/SPIR Targets by Erich Keane · 6 years ago
  44. eba0c57 [MSP430] Ajust f32/f64 alignment according to MSP430 EABI by Anton Korobeynikov · 6 years ago
  45. ccfa90a [WebAssembly] Add a __wasi__ target macro by Dan Gohman · 6 years ago
  46. 70f6c82 [WebAssembly] Support __float128 by Dan Gohman · 6 years ago
  47. 324f918 Update the file headers across all of the LLVM projects in the monorepo by Chandler Carruth · 6 years ago
  48. 35b9005 Convert two more files that were using Windows line endings and remove by Chandler Carruth · 6 years ago
  49. d19326b Revert "Clang side support for @cc assembly operands." by Nirav Dave · 6 years ago
  50. 494d569 Clang side support for @cc assembly operands. by Nirav Dave · 6 years ago
  51. c476329 [Nios2] Remove Nios2 backend by Craig Topper · 6 years ago
  52. 5cb757a [WebAssembly] Add unimplemented-simd128 feature, gate builtins by Thomas Lively · 6 years ago
  53. ad0cb4e [AMDGPU] Separate feature dot-insts by Stanislav Mekhanoshin · 6 years ago
  54. 72d6353 Android is not GNU, so don't claim that it is. by Dan Albert · 6 years ago
  55. 2c99c22 Replace getOS() == llvm::Triple::*BSD with isOS*BSD() [NFCI] by Michal Gorny · 6 years ago
  56. d569b56 Basic: make `int_least64_t` and `int_fast64_t` match on Darwin by Saleem Abdulrasool · 6 years ago
  57. 27ce6b3 Move CodeGenOptions from Frontend to Basic by Richard Trieu · 6 years ago
  58. f09e30f [PowerPC] VSX register support for inline assembly by Kang Zhang · 7 years ago
  59. 9a07762 ARM, AArch64: support `__attribute__((__swiftcall__))` by Saleem Abdulrasool · 7 years ago
  60. 88c0bc1 [Hexagon] Add support for Hexagon V66 by Krzysztof Parzyszek · 7 years ago
  61. 95f99e9 [Haiku] Support __float128 for x86 and x86_64 by Kristina Brooks · 7 years ago
  62. 3a7308f [SystemZ] Do not support __float128 by Ulrich Weigand · 7 years ago
  63. 2709c8b Add Hurd target to Clang driver (2/2) by Kristina Brooks · 7 years ago
  64. fc32b29 [clang][ARC] Add ARCTargetInfo by Tatyana Krasnukha · 7 years ago
  65. f502515 [X86] Add -march=cascadelake support in clang. by Craig Topper · 7 years ago
  66. 96b26a8 [AArch64] Add aarch64_vector_pcs function attribute to Clang by Sander de Smalen · 7 years ago
  67. 1168491 Fix clang -Wimplicit-fallthrough warnings across llvm, NFC by Reid Kleckner · 7 years ago
  68. d1628e4 Add LLVM_FALLTHROUGH annotation after switch by Reid Kleckner · 7 years ago
  69. 4ddbc31 [Clang][PowerPC] Support constraint 'wi' in asm by Li Jia He · 7 years ago
  70. e1dcbc2 NFC: Remove the ObjC1/ObjC2 distinction from clang (and related projects) by Erik Pilkington · 7 years ago
  71. f852c38 [AArch64] Implement FP16FML intrinsics by Bryan Chan · 7 years ago
  72. a906279 Implement Function Multiversioning for Non-ELF Systems. by Erich Keane · 7 years ago
  73. 087ec17 Add gfx909 to GPU Arch by Tim Renouf · 7 years ago
  74. 8572787 AMDGPU: Handle gfx909 in AMDGPUTargetInfo::initFeatureMap by Konstantin Zhuravlyov · 7 years ago
  75. 8da6768 Add gfx904 and gfx906 to GPU Arch by Yaxun Liu · 7 years ago
  76. 8ba68e7 [X86] Remove 'rtm' feature from KNL. by Craig Topper · 7 years ago
  77. 65b8b2a [Hexagon] Remove support for V4 by Krzysztof Parzyszek · 7 years ago
  78. a4bff95 [AArch64] Define __ELF__ for aarch64-none-elf and other similar triples. by Eli Friedman · 7 years ago
  79. ed69793 [mips] Fix handling of GNUABIN32 environment in a target triple by Simon Atanasyan · 7 years ago
  80. e4d507a [X86] Remove FeatureRTM from Skylake processor list by Craig Topper · 7 years ago
  81. cb44f60 Introduce code_model macros by Ali Tamur · 7 years ago
  82. ef72cd7 [X86] Add the movbe instruction intrinsics from icc. by Craig Topper · 7 years ago
  83. 7d533b5 [ARM] Prevent DSP and SIM32 being set for v6m by Sam Parker · 7 years ago
  84. f10f8c2 [ARM/AArch64][v8.5A] Add Armv8.5-A target by Oliver Stannard · 7 years ago
  85. 252ecba [CUDA] Added basic support for compiling with CUDA-10.0 by Artem Belevich · 7 years ago
  86. 9e910c6 Basic: correct `__WINT_TYPE__` on Windows by Saleem Abdulrasool · 7 years ago
  87. 6fb0216 Move AESNI generation to Skylake and Goldmont by Erich Keane · 7 years ago
  88. 17172e0 [ARM] Set __ARM_FEATURE_SIMD32 for +dsp cores by Sam Parker · 7 years ago
  89. 905c589 Revert r323281 "Adjust MaxAtomicInlineWidth for i386/i486 targets." by Hans Wennborg · 7 years ago
  90. 2d45136 [x86/retpoline] Split the LLVM concept of retpolines into separate by Chandler Carruth · 7 years ago
  91. 7aca6c1 [clang][mips] Set __mips_fpr correctly for -mfpxx by Stefan Maksimovic · 7 years ago
  92. df3559c AMDGPU: Move target code into TargetParser by Matt Arsenault · 7 years ago
  93. 8c81318 AMDGPU: Correct errors in device table by Matt Arsenault · 7 years ago
  94. 2203039 AMDGPU: Fix enabling denormals by default on pre-VI targets by Matt Arsenault · 7 years ago
  95. a2bfc97 AMDGPU: Add builtin for s_dcache_wb by Matt Arsenault · 7 years ago
  96. c5f6c22 AMDGPU: Add builtin for s_dcache_inv_vol by Matt Arsenault · 7 years ago
  97. 87aefa4 Try to make builtin address space declarations not useless by Matt Arsenault · 7 years ago
  98. 74686a9 [AArch64][ARM] Add Armv8.4-A tests by Sjoerd Meijer · 7 years ago
  99. abdbb60 Remove trailing space by Fangrui Song · 7 years ago
  100. 7d295a3 [ARM64] [Windows] Follow MS X86_64 C++ ABI when passing structs by Sanjin Sijaric · 7 years ago